Commit graph

91 commits

Author SHA1 Message Date
Marcin Ślusarz
d05f7b4a2c intel: fix INTEL_DEBUG environment variable on 32-bit systems
INTEL_DEBUG is defined (since 4015e1876a) as:

 #define INTEL_DEBUG __builtin_expect(intel_debug, 0)

which unfortunately chops off upper 32 bits from intel_debug
on platforms where sizeof(long) != sizeof(uint64_t) because
__builtin_expect is defined only for the long type.

Fix this by changing the definition of INTEL_DEBUG to be function-like
macro with "flags" argument. New definition returns 0 or 1 when
any of the flags match.

Most of the changes in this commit were generated using:
for c in `git grep INTEL_DEBUG | grep "&" | grep -v i915 | awk -F: '{print $1}' | sort | uniq`; do
    perl -pi -e "s/INTEL_DEBUG & ([A-Z0-9a-z_]+)/INTEL_DBG(\1)/" $c
    perl -pi -e "s/INTEL_DEBUG & (\([A-Z0-9_ |]+\))/INTEL_DBG\1/" $c
done
but it didn't handle all cases and required minor cleanups (like removal
of round brackets which were not needed anymore).

Signed-off-by: Marcin Ślusarz <marcin.slusarz@intel.com>
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Reviewed-by: Caio Marcelo de Oliveira Filho <caio.oliveira@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/13334>
2021-10-15 19:55:14 +00:00
Rob Clark
1c1c43fbab gallium/u_threaded: Split out options struct
Rather than having an ever increasing list of parameters to
threaded_context_create(), split out a struct for optional
flags and parameters.  This should reduce churn in adding
new options.

Signed-off-by: Rob Clark <robdclark@chromium.org>
Reviewed-By: Mike Blumenkrantz <michael.blumenkrantz@gmail.com>
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/13207>
2021-10-07 17:32:25 +00:00
Rob Clark
75808934f8 gallium/u_threaded: Get reset status without sync
GPU hangs are asynchronous already, there should not be an expectation
that this is synchronized with driver thread.

Signed-off-by: Rob Clark <robdclark@chromium.org>
Mike Blumenkrantz <michael.blumenkrantz@gmail.com>

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/13163>
2021-10-04 19:45:28 +00:00
Kenneth Graunke
b8ef3271c8 iris: Move suballocated resources to a dedicated allocation on export
We don't want to export suballocated resources to external consumers,
for a variety of reasons.  First of all, it would be exporting random
other pieces of memory which we may not want those external consumers
to have access to.  Secondly, external clients wouldn't be aware of
what buffers are packed together and busy-tracking implications there.
Nor should they be.  And those are just the obvious reasons.

When we allocate a resource with the PIPE_BIND_SHARED flag, indicating
that it's going to be used externally, we avoid suballocation.

However, there are times when the client may suddenly decide to export
a texture or buffer, without any prior warning.  Since we had no idea
this buffer would be exported, we suballocated it.  Unfortunately, this
means we need to transition it to a dedicated allocation on the fly, by
allocating a new buffer and copying the contents over.

Making things worse, this often happens in DRI hooks that don't have an
associated context (which we need to say, run BLORP commands).  We have
to create an temporary context for this purpose, perform our blit, then
destroy it.  The radeonsi driver uses a permanent auxiliary context
stored in the screen for this purpose, but we can't do that because it
causes circular reference counting.  radeonsi doesn't do the reference
counting that we do, but also doesn't use u_transfer_helper, so they
get lucky in avoiding stale resource->screen pointers.  Other drivers
don't create an auxiliary context, so they avoid this problem for now.

For auxiliary data, rather than copying it over bit-for-bit, we simply
copy over the underlying data using iris_copy_region (GPU memcpy), and
take whatever the resulting aux state is from that operation.  Assuming
the copy operation compresses, the result will be compressed.

v2: Stop using a screen->aux_context and just invent one on the fly to
    avoid circular reference counting issues.

Acked-by: Paulo Zanoni <paulo.r.zanoni@intel.com> [v1]
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/12623>
2021-10-01 04:58:26 +00:00
Ian Romanick
42c34e1ac8 iris: Enable threaded shader compilation
There are a couple minor things that can be improved:

1. Eliminate (or reduce) the dynamic allocation of the
threaded_compile_job.

2. For apps like shader-db, improve the case where nr_threads=0.  Right
now this adds thread switching and mutex overhead.

3. Other performance improvements?  iris_uncompiled_shader::variants has
some special properties that make it ripe for replacement with a
lockless list.  Without gathering some data, it's hard to guess what
impact that could have.

v2: Fix whitespace and formatting issues.  Noticed by Ken.
s/threaded_compile_job/iris_threaded_compile_job/g.  Suggested by Ken.

Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/11229>
2021-07-28 17:32:44 +00:00
Kenneth Graunke
aefba29cd3 iris: Force device local memory for u_upload_mgr buffers
We try to place persistent/coherent buffers from the application in
system memory, because they want the CPU-GPU coherency.

However, our internal u_upload_mgr buffers are also flagged persistent +
coherent, but we absolutely want most of them in device local memory.

Mark had done this correctly in an earlier patch series, but I made a
mistake when refactoring things during upstreaming, and accidentally
put these in SMEM again.  This fixes that mistake.

Tested-by: Luis Felipe Strano Moraes <luis.strano@intel.com>
Reviewed-by: Jordan Justen <jordan.l.justen@intel.com>
Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/11681>
2021-07-07 13:04:11 -07:00
Jason Ekstrand
ae18e1e707 iris: Add support for scratch on XeHP
Rework:
 * Jordan: Handle prog_data->total_scratch==0 in iris_upload_compute_walker
 * Jordan: Resolve iris_get_scratch_space conflict with e2c5ef6cd6
 * Jordan: Rebase on 4256f7ed58. broken
 * Ken: Mostly fixed the rebase
 * Jordan: Fix two small compilation issues
 * Jordan: Rebase on Ken's ("iris: Make a pin_scratch_space() helper")
 * Lionel: Fix a few bugs with scratch handles
 * Jason: Tidy the patch up a bit

Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
Reviewed-by: Jordan Justen <jordan.l.justen@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/11582>
2021-06-25 00:18:29 +00:00
Jason Ekstrand
545011b445 iris: Add a MEMZONE_BINDLESS and uploader
Reviewed-by: Jordan Justen <jordan.l.justen@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/11582>
2021-06-25 00:18:29 +00:00
Marek Olšák
ec77a2d43a gallium/u_threaded: add callbacks and documentation for resource busy checking
Reviewed-By: Mike Blumenkrantz <michael.blumenkrantz@gmail.com>
Reviewed-by: Rob Clark <robdclark@chromium.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/10662>
2021-05-17 10:37:24 +00:00
Mark Janes
8838861ea3 iris: Upload constant resources for efficient GPU access
Re-using the stream_uploader for constant data hurts performance on
DG1.  Constant data like uniform buffers should reside in local
memory for faster GPU access.

Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Reviewed-by: Jordan Justen <jordan.l.justen@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/10759>
2021-05-11 16:03:18 -07:00
Mark Janes
ecd75318e3 iris: Increase the size of upload buffers
Smaller sizes may generate CPU overhead while saving negligible
memory.

Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Reviewed-by: Jordan Justen <jordan.l.justen@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/10759>
2021-05-11 16:03:15 -07:00
Anuj Phogat
61e8636557 intel: Rename gen_device prefix to intel_device
export SEARCH_PATH="src/intel src/gallium/drivers/iris src/mesa/drivers/dri/i965"
grep -E "gen_device" -rIl $SEARCH_PATH | xargs sed -ie "s/gen_device/intel_device/g"

Signed-off-by: Anuj Phogat <anuj.phogat@gmail.com>
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/10241>
2021-04-20 20:06:33 +00:00
Dave Airlie
a067399e37 iris: move get_time into a static in bufmgr code.
This ends up polluting the namespace if you build iris/crocus
at once, just move it to where it's used for now.

Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Reviewed-by: Adam Jackson <ajax@redhat.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/10308>
2021-04-19 16:00:51 +10:00
Anuj Phogat
b75f095bc7 intel: Rename genx keyword to gfxx in source files
Commands used to do the changes:
export SEARCH_PATH="src/intel src/gallium/drivers/iris src/mesa/drivers/dri/i965"
grep -E "gen[[:digit:]]+" -rIl $SEARCH_PATH | xargs sed -ie "s/gen\([[:digit:]]\+\)/gfx\1/g"

Exclude pack.h and xml changes in this patch:
grep -E "gfx[[:digit:]]+_pack\.h" -rIl $SEARCH_PATH | xargs sed -ie "s/gfx\([[:digit:]]\+_pack\.h\)/gen\1/g"
grep -E "gfx[[:digit:]]+\.xml" -rIl $SEARCH_PATH | xargs sed -ie "s/gfx\([[:digit:]]\+\.xml\)/gen\1/g"

Signed-off-by: Anuj Phogat <anuj.phogat@gmail.com>
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/9936>
2021-04-02 18:33:07 +00:00
Anuj Phogat
99331f6deb intel: Rename genx10 field in gen_device_info struct to verx10
Commands used to do the changes:
export SEARCH_PATH="src/intel src/gallium/drivers/iris src/mesa/drivers/dri/i965"
grep -E "info\)*(.|->)genx10" -rIl $SEARCH_PATH | xargs sed -ie "s/info\()*\)\(\.\|->\)genx10/info\1\2verx10/g"

Signed-off-by: Anuj Phogat <anuj.phogat@gmail.com>
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/9936>
2021-04-02 18:33:07 +00:00
Kenneth Graunke
a30d091a10 iris: Delete stale comment in iris_lost_context_state
Hasn't been necessary since b338bb70e0.
Caught by Dave Airlie.

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/9752>
2021-03-22 18:58:27 +00:00
Anuj Phogat
96e251bde7 intel: Rename "GEN_" prefix used in common code to "INTEL_"
This patch renames all macros with "GEN_" prefix defined in
common code.

Signed-off-by: Anuj Phogat <anuj.phogat@gmail.com>
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/9413>
2021-03-10 22:23:51 +00:00
Anuj Phogat
733b0ee8cb intel: Rename files with gen_ prefix in common code to intel_
Changes in this patch include:
- Rename all files in src/intel/common path
- Update the filenames used in source and build files

Signed-off-by: Anuj Phogat <anuj.phogat@gmail.com>
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/9413>
2021-03-10 22:23:51 +00:00
Kenneth Graunke
206495cac4 iris: Enable u_threaded_context
This implements most of the remaining u_threaded_context support.  Most
of the heavy lifting was done in the previous patches which fixed things
up for the new thread safety requirements.  Only a few things remain.

u_threaded_context support can be disabled via an environment variable:

   GALLIUM_THREAD=0

On Felix's Tigerlake with the GPU at fixed frequency, enabling
u_threaded_context improves performance of several games:

   - Civilization VI: +17%
   - Shadow of Mordor: +6%
   - Bioshock Infinite +6%
   - Xonotic: +6%

Various microbenchmarks improve substantially as well:

   - GfxBench5 gl_driver2: +58%
   - SynMark2 OglBatch6: +54%
   - Piglit drawoverhead: +25%

Reviewed-by: Zoltán Böszörményi <zboszor@gmail.com>
Reviewed-by: Ian Romanick <ian.d.romanick@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/8964>
2021-03-04 13:59:21 -08:00
Kenneth Graunke
c133d0930f iris: Use thread safe slab allocators in transfer_map handling
pipe->transfer_map can be called from u_threaded_context's thread
rather than the driver thread.  We need to use two different slab
allocators, one for each thread.  transfer_unmap, on the other hand,
is only ever called from the driver thread.

Reviewed-by: Zoltán Böszörményi <zboszor@gmail.com>
Reviewed-by: Ian Romanick <ian.d.romanick@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/8964>
2021-03-04 13:59:21 -08:00
Jordan Justen
18bc7d9d3f intel: Use devinfo genx10 field
Signed-off-by: Jordan Justen <jordan.l.justen@intel.com>
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Reviewed-by: Anuj Phogat <anuj.phogat@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/9329>
2021-03-01 22:00:08 -08:00
Kenneth Graunke
f7d4ebbf86 iris: add hooks to call INTEL_MEASURE
These hooks were written in the initial IRIS_MEASURE implementation.
Minor changes by Mark Janes <markjanes@swizzler.org> to adapt to the
INTEL_MEASURE reimplementation.

Acked-by: Kenneth Graunke <kenneth@whitecape.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/7354>
2021-02-01 17:24:57 -08:00
Mark Janes
b338bb70e0 iris: add a iris_context reference to iris_batch
This eliminates the need to use container_of in error handling code.
INTEL_MEASURE will need to access the iris context from each batch.

suggested-by: Kenneth Graunke <kenneth@whitecape.org>

Acked-by:     Kenneth Graunke <kenneth@whitecape.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/7354>
2021-02-01 17:24:57 -08:00
Kenneth Graunke
939bc0c588 iris: Reconfigure the URB only if it's necessary or possibly useful
Reconfiguring the URB partitioning is likely to cause shader stalls,
as the dividing line between each stage's section of memory is moving.
(Technically, 3DSTATE_URB_* are pipelined commands, but that mostly
means that the command streamer doesn't need to stall.)  So it should
be beneficial to update the URB configuration less often.

If the previous URB configuration already has enough space for our
current shader's needs, we can just continue using it, assuming we
are able to allocate the maximum number of URB entries per stage.
However, if we ran out of URB space and had to limit the number of
URB entrties for a stage, and the per-entry size is larger than we
need, we should reconfigure it to try and improve concurrency.

So, we begin tracking the last URB configuration in the context,
and compare against that when updating shader variants.

Cuts 36% of the URB reconfigurations (excluding BLORP) from a
Shadow of Mordor trace, and 46% from a GFXBench Manhattan 3.0 trace.

One nice thing is that this removes the need to look at the old
prog_data when updating shaders, which should make it possible to
unbind shader variants without causing spurious URB updates.

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/8721>
2021-01-27 18:30:54 +00:00
Rob Clark
790144e65a util+treewide: container_of() cleanup
Replace mesa's slightly different container_of() with one more aligned
to the linux kernel's version which takes a type as the 2nd param.  This
avoids warnings like:

  freedreno_context.c:396:44: warning: variable 'batch' is uninitialized when used within its own initialization [-Wuninitialized]

At the same time, we can add additional build-time type-checking asserts

Signed-off-by: Rob Clark <robdclark@chromium.org>
Acked-by: Erik Faye-Lund <erik.faye-lund@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/7941>
2020-12-10 16:48:36 +00:00
Jordan Justen
cd3251d6ba intel/iris: Build gen 12.5
Reworks:
 * genX_call in iris_screen.c (found by Jason)

Signed-off-by: Jordan Justen <jordan.l.justen@intel.com>
Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/7757>
2020-12-01 19:06:22 +00:00
Nanley Chery
5194cbc766 iris: Flush dmabufs during context flushes
Currently, every modifier that uses CCS also lacks support for
fast-clears. On gen9+, dmabufs may gain fast-cleared blocks through
clear calls. On gen12, fast-clearing can occur during any rendering
operation. Mark when dmabufs gain fast-cleared blocks and flush them
during a context flush operation.

Cc: mesa-stable
Closes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/3425
Tested-by: Simon Ser <contact@emersion.fr>
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/7384>
2020-11-04 19:42:43 +00:00
Ian Romanick
5490f5cbce iris: Don't generate Gen10-specific functions
v2: Also update Makefile.sources and Android build files.  Noticed by
Lionel.  Remove more stuff from iris_context.h.

Reviewed-by: Jason Ekstrand <jason@jlekstrand.net> [v1]
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6899>
2020-10-15 09:29:54 -07:00
Marcin Ślusarz
e6d26fbf3d iris: drop likely/unlikely around INTEL_DEBUG
It's included in declaration of INTEL_DEBUG.

Signed-off-by: Marcin Ślusarz <marcin.slusarz@intel.com>
Acked-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Reviewed-by: Matt Turner <mattst88@gmail.com>
Reviewed-by: Eric Anholt <eric@anholt.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6732>
2020-10-06 18:43:07 +00:00
Francisco Jerez
46183a999b iris: Extend iris_context dirty state flags to 128 bits.
We're nearly out of dirty bits, and some patches pending review on
GitLab no longer apply due to that.  Make room for them by splitting
off shader stage-specific bits into a separate stage_dirty mask.

An alternative would be to split compute-related bits into a separate
mask, but that would prevent the '<< stage' indexing done in various
parts of the driver from working.

Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5279>
2020-06-03 22:22:19 +00:00
Caio Marcelo de Oliveira Filho
33c61eb2f1 iris: Implement ARB_compute_variable_group_size
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Reviewed-by: Jordan Justen <jordan.l.justen@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4794>
2020-05-01 12:50:37 -07:00
Kenneth Graunke
fb95ac6855 iris: Destroy transfer slab after batches
Batches are going to have an uploader in the next commit, so destroying
batches will destroy uploaders, which will unmap transfers, which will
return things to the slab allocator.  So we need to reorder destroying
the slab allocator to the end to avoid crashing.

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/3802>
2020-05-01 19:00:02 +00:00
Kenneth Graunke
c94379c770 iris: Give up on not passing ice to iris_init_batch
We're going to need it to create a uploader in the batch soon.  We still
avoid storing it, to maintain the charade of separation, and make people
think twice about fetching random fields from there and intertwining
things even worse.

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/3802>
2020-05-01 19:00:02 +00:00
Mike Blumenkrantz
91375f13ce iris: move iris_vtable to iris_screen
instead of inlining this into every context, now a struct is used in the screen
struct to reduce memory usage and simplify a couple of the methods

Closes: https://gitlab.freedesktop.org/kwg/mesa/-/issues/6
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4376>
2020-04-29 16:59:45 +00:00
Jason Ekstrand
bff7b3c7bd iris: Use the URB size from the L3$ config
Cc: "20.0" mesa-stable@lists.freedesktop.org
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3454>
2020-01-30 18:46:14 -06:00
Kenneth Graunke
afcb6625e3 iris: Drop 'engine' from iris_batch.
For the moment, everything is I915_EXEC_RENDER, so this isn't necessary.
But even should that change, I don't think we want to handle multiple
engines in this manner.

Nowadays, we have batch->name (IRIS_BATCH_RENDER, IRIS_BATCH_COMPUTE,
possibly an IRIS_BATCH_BLIT for blorp batches someday), which describes
the functional usage of the batch.  We can simply check that and select
an engine for that class of work (assuming there ever is more than one).

Reviewed-by: Tapani Pälli <tapani.palli@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3613>
2020-01-29 19:53:22 +00:00
Dongwon Kim
8a8534a698 iris: INTEL performance query implementation
low-level implementation of INTEL-performance-query APIs in
Intel iris driver. Most of functions and procedures defined here
are adopted from i965 driver (brw_performance_query.c)

v2: - replace genX_init_performance_query with
      iris_init_perfquery_functions which is gen's version agnositic
    - general code clean-up

v3: include gen_perf_gens.h as some of defines were moved to this new
    header file

v4: - checking for kernel 4.13+ won't be needed here as Iris won't be
      loaded anyway without DRM_SYNCOBJ that is enabled after Kernel
      4.13.

    - checking whether gen < 8 or is_cherryview won't be required as
      well because those cases are screened in iris_screen_create.

v5: remove genX(init_performance_query)

v6: - remove oa_metrics_kernel_support as iris works only with kernel
    4.18 and newer.

    - use perf functions defined in separate file, iris_perf.h/c

Signed-off-by: Dongwon Kim <dongwon.kim@intel.com>
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
2019-12-10 17:02:58 -08:00
Eric Anholt
882ca6dfb0 util: Move gallium's PIPE_FORMAT utils to /util/format/
To make PIPE_FORMATs usable from non-gallium parts of Mesa, I want to
move their helpers out of gallium.  Since u_format used
util_copy_rect(), I moved that in there, too.

I've put it in a separate directory in util/ because it's a big chunk
of related code, and it's not clear to me whether we might want it as
a separate library from libmesa_util at some point.

Closes: #1905
Acked-by: Marek Olšák <marek.olsak@amd.com>
Reviewed-by: Kristian H. Kristensen <hoegsberg@google.com>
Reviewed-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
2019-11-14 10:47:20 -08:00
Jordan Justen
2e6a7ced4d
iris/gen12: Write GFX_AUX_TABLE base address register
Rework:
 * Move last_aux_map_state to iris_batch. (Nanley, Ken)

Signed-off-by: Jordan Justen <jordan.l.justen@intel.com>
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
2019-10-28 00:09:14 -07:00
Kenneth Graunke
90a35752b4 iris: Drop bonus parameters from iris_init_*_context()
Nothing uses vtbl or dbg, and screen is available from the batch.
2019-10-07 13:15:56 -07:00
Jordan Justen
44ab7c265f
iris: Build for gen12
Signed-off-by: Jordan Justen <jordan.l.justen@intel.com>
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
2019-08-28 13:38:33 -07:00
Francisco Jerez
026773397b iris/gen9: Optimize slice and subslice load balancing behavior.
See "i965/gen9: Optimize slice and subslice load balancing behavior."
for the rationale.

Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
2019-08-12 13:17:58 -07:00
Kenneth Graunke
b61f17d362 iris: Skip emitting 3DSTATE_INDEX_BUFFER if possible
We were emitting 3DSTATE_INDEX_BUFFER on every indexed draw, even if
back-to-back draws referred to the same index buffer.  This improves
drawoverhead scores in the DrawElements cases by about 10%, by giving
us even more minimal batches.
2019-07-31 15:14:10 -07:00
Kenneth Graunke
fe7ed6b057 iris: Make iris_query.c a genxml-compiled file.
This will let us use Jason's new MI-builder shortly.

Reviewed-by: Caio Marcelo de Oliveira Filho <caio.oliveira@intel.com>
2019-07-25 18:42:55 +00:00
Kenneth Graunke
0f1b68ebee iris: Re-emit Surface State Base Address when context is lost.
When we hit a GPU hang, we failed to reset Surface State Base Address
right away, and would keep hanging until we filled up the binder.  Then
we'd finally get it right after a lot of repeated stumbles.  Update it
right away so we hopefully hang fewer times before succeeding.
2019-05-29 16:35:02 -07:00
Kenneth Graunke
7d2b54e393 iris: Record state sizes for INTEL_DEBUG=bat decoding.
Felix noticed a crash when using INTEL_DEBUG=bat decoding.  It turned
out that we were sometimes placing variable length data near the end
of a buffer, and with the decoder guessing random lengths rather than
having an actual count, it was walking off the end and crashing.  So
this does more than improve the decoder output.

Unfortunately, this is a bit more complicated than i965's handling,
because we don't have a single state buffer.  Various places upload
data via u_upload_mgr, and so there isn't a central place to record
the size.  We don't need to catch every single place, however, since
it's only important to record variable length packets (like viewports
and binding tables).

State data also lives arbitrarily long, rather than being discarded on
every batch like i965, so we don't know when to clear out old entries
either.  (We also don't have a callback when an upload buffer is
released.)  So, this tracking may space leak over time.  That's probably
okay though, as this is only a debugging feature and it's a slow leak.
We may also get lucky and overwrite existing entries as we reuse BOs,
though I find this unlikely to happen.

The fact that the decoder works in terms of offsets from a state base
address is also not ideal, as dynamic state base address and surface
state base address differ for iris.  However, because dynamic state
addresses start from the top of a 4GB region, and binding tables start
from addresses [0, 64K), it's highly unlikely that we'll get overlap.

We can always improve this, but for now it's better than what we had.
2019-05-23 08:07:08 -07:00
Kenneth Graunke
c61862ddfc iris: Expose PIPE_CAP_DEVICE_RESET_STATUS_QUERY
This provides a way for the application to query whether any resets have
happened, which lets us expose "robust" contexts.  This also enables the
KHR_robust_buffer_access_behavior tests.
2019-05-09 16:49:07 -07:00
Kenneth Graunke
343f41781c iris: Hook up device reset callbacks
This mechanism lets the driver inform the state tracker about GPU
resets, say for destroying a robust API context and reporting a "device
lost" error to the application, making it take action to deal with this.
2019-05-09 16:49:07 -07:00
Kenneth Graunke
c5c12bdd00 iris: Try to recover from GPU hangs.
The iris batch module now tries to detect that the kernel has banned
our GEM context, creates a new non-banned context, and informs the
iris context module that all assumptions about state are now invalid
and it needs to reinitialize the relevant state.

Based on Chris Wilson's work, but significantly rewritten by me.
2019-05-09 16:49:07 -07:00
Kenneth Graunke
aa7306b4cf iris: Some tidying for preemption support
Just enable it during init_render_context on Gen10+, and move the
Gen9 state tracking into iris_genx_state so it only exists on Gen9.

Reviewed-by: Mike Blumenkrantz <michael.blumenkrantz@gmail.com>
Reviewed-by: Rafael Antognolli <rafael.antognolli@intel.com>
2019-04-25 11:26:24 -07:00