Commit graph

146250 commits

Author SHA1 Message Date
Rob Clark
0480595d03 freedreno/isa: Add immed reg accessors
This way we can assert that a src that we expect to be an immediate
actually is.

Signed-off-by: Rob Clark <robdclark@chromium.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/13353>
2021-10-15 15:52:33 +00:00
Rob Clark
e08d152d68 isaspec: Add bitfield size assertions
Signed-off-by: Rob Clark <robdclark@chromium.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/13353>
2021-10-15 15:52:33 +00:00
Rob Clark
4166635bd1 isaspec: Do not emit duplicate field encodes
If an <override> overrides the definition of a field, don't emit
encoding for both the override's definition and the fallback.  (See
"SAMP" in #cat5-src3).  It is harmless currently, because (in this
case) it will just re-encode the low bits of "SAMP".  But when we
start asserting on that the field being encoded fits in the allowed
number of bits, the re-encoding of the fallback field definition
will start triggering asserts.

Signed-off-by: Rob Clark <robdclark@chromium.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/13353>
2021-10-15 15:52:33 +00:00
Rob Clark
e01759e6f3 isaspec: Fix derived field width
The low/high bit positions should be integers.

Signed-off-by: Rob Clark <robdclark@chromium.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/13353>
2021-10-15 15:52:33 +00:00
Rob Clark
5b6e5db5d0 freedreno/ir3: Don't lower s2en if samp/tex is too large
We only have four bits to encode an immediate samp/tex.

Signed-off-by: Rob Clark <robdclark@chromium.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/13353>
2021-10-15 15:52:33 +00:00
Rob Clark
bfd8b7c930 freedreno/ir3/tests: Add additional disasm test vectors
Add branch with negative offset, and a couple others to trigger issues I
found while adding pack_field() overflow asserts.

Signed-off-by: Rob Clark <robdclark@chromium.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/13353>
2021-10-15 15:52:33 +00:00
Rob Clark
c0ecfeb023 freedreno/ir3/tests: Fix indentation
Signed-off-by: Rob Clark <robdclark@chromium.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/13353>
2021-10-15 15:52:33 +00:00
Rob Clark
8b0550f09f freedreno/isa: Fixes for validation
Signed-off-by: Rob Clark <robdclark@chromium.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/13353>
2021-10-15 15:52:33 +00:00
Rob Clark
9516d8ce98 freedreno/ir3+isa: Cleanup bindless cat5 samp/tex encoding
Don't let the way they are encoded at the isa level leak thru to the
ir3 level.

Signed-off-by: Rob Clark <robdclark@chromium.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/13353>
2021-10-15 15:52:33 +00:00
Jason Ekstrand
d43f89f17a ir3: Images are always nir_var_mem_image
Reviewed-by: Caio Marcelo de Oliveira Filho <caio.oliveira@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4743>
2021-10-15 14:58:56 +00:00
Jesse Natalie
9601556079 microsoft/clc: Images use nir_var_mem_image
The only big change is that lower_vars_to_explicit no longer assigns
a driver_location for images. That means that the storage for the
format/order loads is no longer implicitly "allocated" in the middle
of the kernel args. Instead, manually add the storage for that to the end
of the input args buffer.

Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4743>
2021-10-15 14:58:56 +00:00
Jason Ekstrand
26d603da07 nir/gl_nir_lower_images: Require nir_var_mem_image
Reviewed-by: Caio Marcelo de Oliveira Filho <caio.oliveira@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4743>
2021-10-15 14:58:56 +00:00
Jason Ekstrand
e6cce80976 intel/fs: Stop emitting TGM fences for nir_var_mem_ssbo
Reviewed-by: Caio Marcelo de Oliveira Filho <caio.oliveira@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4743>
2021-10-15 14:58:56 +00:00
Jason Ekstrand
8ab40f517f aco: Split var_mem_image barrier handling from global/ssbo
Reviewed-by: Rhys Perry <pendingchaos02@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4743>
2021-10-15 14:58:56 +00:00
Jason Ekstrand
4c5a88d735 nir: Validate image variable modes
We can also significantly simplify the foreach_image_variable helper.

Reviewed-by: Caio Marcelo de Oliveira Filho <caio.oliveira@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4743>
2021-10-15 14:58:56 +00:00
Jason Ekstrand
97a7c0ab1b st/pbo: Use nir_var_mem_image for images
Reviewed-by: Caio Marcelo de Oliveira Filho <caio.oliveira@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4743>
2021-10-15 14:58:56 +00:00
Rhys Perry
458b4d2095 radv: Use nir_var_mem_image in meta shaders
Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4743>
2021-10-15 14:58:56 +00:00
Jason Ekstrand
9f51fda92c ttn: Use nir_var_mem_image
Reviewed-by: Caio Marcelo de Oliveira Filho <caio.oliveira@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4743>
2021-10-15 14:58:56 +00:00
Jason Ekstrand
b8ee37472d glsl: Use nir_var_mem_image for images
We don't use it for bindless images because the uniforms in that case
just contain a bindless handle and aren't an actual image.  Bound
images, on the other hand, go in the nir_var_mem_image class.

Reviewed-by: Caio Marcelo de Oliveira Filho <caio.oliveira@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4743>
2021-10-15 14:58:56 +00:00
Caio Marcelo de Oliveira Filho
cfdc7ee066 spirv: Use nir_var_mem_image
Use the new nir_var_mem_image mode for images that are not known to be
used with a sampler (i.e. storage images).

Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
Reviewed-by: Jesse Natalie <jenatali@microsoft.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4743>
2021-10-15 14:58:56 +00:00
Jason Ekstrand
219ac26ea3 spirv: Assert that OpTypeForwardPointer only points to structs
Reviewed-by: Caio Marcelo de Oliveira Filho <caio.oliveira@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4743>
2021-10-15 14:58:56 +00:00
Jason Ekstrand
e87dbfd3e8 ir3: Check for nir_var_mem_image in shared_barrier handling
Reviewed-by: Caio Marcelo de Oliveira Filho <caio.oliveira@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4743>
2021-10-15 14:58:56 +00:00
Jason Ekstrand
ae58894ee7 zink: Images can live in nir_var_mem_image now
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4743>
2021-10-15 14:58:56 +00:00
Jason Ekstrand
d68bedbb45 clover: Use nir_foreach_image_variable for images
This splits image and sampler handling into two separate loops.

Reviewed-by: Caio Marcelo de Oliveira Filho <caio.oliveira@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4743>
2021-10-15 14:58:56 +00:00
Jason Ekstrand
aefa22ddb5 clover: Insert dummy uniform variables for images
Instead of making images have a well-defined size, insert a dummy
variable of the appropriate type which we can use for the parameter
block layout.  This will work much better when we switch over to
nir_var_mem_image.

Acked-by: Caio Marcelo de Oliveira Filho <caio.oliveira@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4743>
2021-10-15 14:58:56 +00:00
Jason Ekstrand
6818811fc4 nir/lower_readonly_images_to_tex: Also rewrite variable modes
Storage images will start using nir_var_mem_image but sampled images
still use nir_var_uniform.  If we're going to rewrite types, we need to
rewrite the modes as well.  Otherwise, nir_validate will get grumpy and
drivers might get confused.

Reviewed-by: Caio Marcelo de Oliveira Filho <caio.oliveira@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4743>
2021-10-15 14:58:56 +00:00
Jason Ekstrand
225caf537a llvmpipe: Support image variables living in nir_var_mem_image
Reviewed-by: Caio Marcelo de Oliveira Filho <caio.oliveira@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4743>
2021-10-15 14:58:56 +00:00
Jason Ekstrand
d84fd86af1 ntt: Separate image and sampler handling
Use nir_foreach_image_variable for images so we survive the coming
refactor where they get their own mode.

Reviewed-by: Caio Marcelo de Oliveira Filho <caio.oliveira@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4743>
2021-10-15 14:58:56 +00:00
Jason Ekstrand
12b3ffe400 st/nir: Assign uniform locations to nir_var_mem_image vars
Reviewed-by: Caio Marcelo de Oliveira Filho <caio.oliveira@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4743>
2021-10-15 14:58:56 +00:00
Jason Ekstrand
b1385f3c87 nir/gl_nir_lower_images: Support nir_var_mem_image
Reviewed-by: Caio Marcelo de Oliveira Filho <caio.oliveira@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4743>
2021-10-15 14:58:56 +00:00
Jason Ekstrand
7bdae87b93 nir/gl_nir_lower_samplers_as_deref: Support nir_var_mem_image
Contrary to the name of the pass, it also handles storage images so we
need to support nir_var_mem_image.

Reviewed-by: Caio Marcelo de Oliveira Filho <caio.oliveira@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4743>
2021-10-15 14:58:56 +00:00
Jason Ekstrand
c0d8dc13e0 glsl/nir_linker: nir_var_mem_image is also a GL uniform
Reviewed-by: Caio Marcelo de Oliveira Filho <caio.oliveira@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4743>
2021-10-15 14:58:56 +00:00
Jason Ekstrand
94b9f25883 aco: Add support for nir_var_mem_image
Reviewed-by: Rhys Perry <pendingchaos02@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4743>
2021-10-15 14:58:56 +00:00
Jason Ekstrand
cd49706cb1 amd/llvm/nir: Add support for nir_var_mem_image
Reviewed-by: Rhys Perry <pendingchaos02@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4743>
2021-10-15 14:58:55 +00:00
Caio Marcelo de Oliveira Filho
26582db077 anv: Use nir_foreach_image_variable
Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4743>
2021-10-15 14:58:55 +00:00
Jason Ekstrand
ff39916ce7 i965/uniforms: Handle images as a separate pass
Instead of walking all uniforms and handling images as a special case,
walk "normal" uniforms first and images as a second pass.  This lets us
use nir_foreach_image_variable which will survive the upcoming refactor.
While we're at it, use nir_foreach_image_variable in
brw_nir_lower_gl_images too.

Reviewed-by: Caio Marcelo de Oliveira Filho <caio.oliveira@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4743>
2021-10-15 14:58:55 +00:00
Caio Marcelo de Oliveira Filho
2d7065ef04 intel/fs: Consider nir_var_mem_image for TGM fences
Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4743>
2021-10-15 14:58:55 +00:00
Jason Ekstrand
2a53c33fbe nir: Add a nir_foreach_image_variable() iterator
Reviewed-by: Caio Marcelo de Oliveira Filho <caio.oliveira@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4743>
2021-10-15 14:58:55 +00:00
Caio Marcelo de Oliveira Filho
de3705edb0 nir: Add nir_var_mem_image
Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4743>
2021-10-15 14:58:55 +00:00
Caio Marcelo de Oliveira Filho
872750bb96 nir/schedule: Handle nir_intrisic_scoped_barrier
Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4743>
2021-10-15 14:58:55 +00:00
Rob Clark
73d6e153eb freedreno: Fix for large epilogues
Apparently Rocket League overflows the fixed size epilogue.  Switch it
to be growable.

Closes: #5493
Signed-off-by: Rob Clark <robdclark@chromium.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/13365>
2021-10-15 14:30:51 +00:00
Ella-0
9ee060b614 v3dv: enable VK_KHR_swapchain_mutable_format
Reviewed-by: Alejandro Piñeiro <apinheiro@igalia.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/13297>
2021-10-15 08:36:36 +00:00
Samuel Pitoiset
aac4e1f822 aco: do not return an empty string when disassembly is not supported
Fixes dEQP-VK.pipeline.executable_properties.* on GFX6-7 when
clrxdisasm isn't found. Other generations are also affected if RADV
is built without LLVM.

Cc: 21.3 mesa-stable
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Tony Wasserka <tony.wasserka@gmx.de>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/13333>
2021-10-15 09:48:29 +02:00
Marcin Ślusarz
5387522bd0 iris: fix scratch address patching for TESS_EVAL stage
Scratch patching code in iris_upload_dirty_render_state (see MERGE_SCRATCH_ADDR
calls) assumes that in all shader stages derived_data field stores 3DSTATE_XS
packet first.

This is not true for TESS_EVAL (DS), so we end up patching 3DSTATE_TE
instead of 3DSTATE_DS leading to DWordLength becoming 11 instead of 9
(9 == 3DSTATE_DS.DWordLength, 2 == 3DSTATE_TE.DWordLength, and 9|2 == 11),
and hardware hanging on the next instruction.

Fix this by reversing the order of packets for TESS_EVAL stage.

Closes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/5499

Fixes: 4256f7ed58 ("iris: Fill out scratch base address dynamically")
Signed-off-by: Marcin Ślusarz <marcin.slusarz@intel.com>
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/13358>
2021-10-15 07:07:51 +00:00
Dave Airlie
7681500ead crocus: Delete the MI_COPY_MEM_MEM resource_copy_region implementation.
(ported from iris - airlied)

The MI_COPY_MEM_MEM version of resource_copy_region has known bugs:

    It's failing to set valid_buffer_range correctly
    It's missing iris_emit_buffer_barrier_for() for the source/destination, so there may be missing flushes.
    There are some bad interactions with the tile cache and VF using L3.

Even with those fixed, if you expand the "no more than 16 bytes" restriction to allow copies up to 1024 bytes, then it starts failing Piglit tests on Icelake.

We could probably fix this. However, I had originally only measured a 0.689096% +/- 0.473968% (n=4) speedup in Shadow of Mordor's OpenGL port, which is already fairly small, especially before adding missing flushes. Further, some of that likely came from not switching between render and compute...which we'll soon be able to avoid thanks to BLOCS.

Folks were also worried that MI_COPY_MEM_MEM can't be pipelined, and that stalling the command streamer may actually slow things down, especially as the GPUs become more powerful. We aren't really sure about this, but it's another concern.

So, let's just get rid of this optimization. It seemed like a good idea at the time, but it's just causing issues for very little gain.

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/13374>
2021-10-15 16:47:24 +10:00
Maniraj D
796c9ab3fd egl: set TSD as NULL after deinit
When eglReleaseThread() is called from application's
destructor (API with __attribute__((destructor))),
it crashes due to invalid memory access.

In this case, _egl_TLS is freed in the flow of
_eglAtExit() as below but _egl_TLS is not set to NULL.

    _eglDestroyThreadInfo
        _eglFiniTSD
            _eglAtExit
                _run_exit_handlers
                    exit

Later when the eglReleaseThread is called from
application's destructor, it ends-up accessing
the freed _egl_TLS pointer.

    eglReleaseThread -> in libEGL_mesa
        eglReleaseThread -> in libEGL(glvnd)
            destructor() -> App's destructor

To resolve the invalid access, setting the _egl_TLS
pointer as NULL after freeing it.

Reviewed-by: Eric Engestrom <eric@engestrom.ch>
Reviewed-by: Jesse Natalie <jenatali@microsoft.com>
Reviewed-by: Tapani Pälli <tapani.palli@intel.com>
Cc: mesa-stable

Closes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/5466
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/13302>
2021-10-15 06:22:13 +00:00
Ella-0
835b98e101 v3dv: implement VK_EXT_host_query_reset
Reviewed-by: Iago Toral Quiroga <itoral@igalia.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/13319>
2021-10-15 05:36:42 +00:00
Jason Ekstrand
393fda2d34 i965: Emit a NULL surface for buffer textures with no buffer
This is a preexisting bug but it was uncovered by 231653ea35
("intel/isl: Add a max_buffer_size limit to isl_device") which added an
assert(num_elements > 0) for typed buffers.

Cc: mesa-stable@lists.freedesktop.org
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/13351>
2021-10-15 03:50:58 +00:00
Witold Baryluk
4d777631b5 zink: Do not access just freed zink_batch_state
Cc: mesa-stable
Reviewed-by: Mike Blumenkrantz <michael.blumenkrantz@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/13370>
2021-10-14 23:02:38 +00:00
Clayton Craft
b2ef7e6d6b anv: don't advertise vk conformance on GPUs that aren't conformant
This sets the conformance version to 0.0.0.0 for GPUs that have
incomplete support for vulkan, so that it's easier to check if vulkan is
fully supported by a GPU at runtime for applications/libraries.

    $ vulkaninfo|grep conf
    MESA-INTEL: warning: Ivy Bridge Vulkan support is incomplete
        conformanceVersion = 0.0.0.0

Signed-off-by: Clayton Craft <clayton@craftyguy.net>
Reviewed-by: Ivan Briano <ivan.briano@intel.com>
Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/13275>
2021-10-14 22:16:30 +00:00