Commit graph

65652 commits

Author SHA1 Message Date
Carl Worth
c35f14f368 Eliminate several cases of multiplication in arguments to calloc
In commit 32f2fd1c5d, several calls to
_mesa_calloc(x) were replaced with calls to calloc(1, x). This is strictly
equivalent to what the code was doing previously.

But for cases where "x" involves multiplication, now that we are explicitly
using the two-argument calloc, we can do one step better and replace:

	calloc(1, A * B);

with:

	calloc(A, B);

The advantage of the latter is that calloc will detect any overflow that would
have resulted from the multiplication and will fail the allocation, (whereas
the former would return a small allocation). So this fix can change
potentially exploitable buffer overruns into segmentation faults.

Reviewed-by: Matt Turner <mattst88@gmail.com>
2014-09-03 18:37:02 -07:00
Kenneth Graunke
96ce065db4 glsl: Report progress from opt_copy_propagation_elements().
It's been altering the tree and reporting "false" since January 2011.

Signed-off-by: Kenneth Graunke <kenneth@whitecape.org>
Reviewed-by: Matt Turner <mattst88@gmail.com>
2014-09-03 17:26:06 -07:00
Kenneth Graunke
702b6ea051 glsl: Skip rewriting instructions in opt_cpe when unnecessary.
Previously, opt_copy_propagation_elements would always rewrite the
instruction stream, even if was the same thing as before.  In order to
report progress correctly, we'll need to bail if the suggested
replacement is identical (or equivalent) to the original code.

This also introduced unnecessary noop swizzles, as far as I can tell.

Signed-off-by: Kenneth Graunke <kenneth@whitecape.org>
Reviewed-by: Matt Turner <mattst88@gmail.com>
2014-09-03 17:26:04 -07:00
Kenneth Graunke
5ced83ee15 glsl: Initialize source_chan in opt_copy_propagation_elements.
Previously, if chans < 4, we passed uninitialized stack garbage to the
ir_swizzle constructor for the excess components.  Thankfully, it
ignores that data, as it's unnecessary, so no harm actually comes of it.

However, it's obviously better to initialize it.

Signed-off-by: Kenneth Graunke <kenneth@whitecape.org>
Reviewed-by: Matt Turner <mattst88@gmail.com>
2014-09-03 17:25:56 -07:00
Kenneth Graunke
8270b048cf i965: Handle ir_triop_csel in emit_bool_to_cond_code().
ir_triop_csel can return a boolean expression, so we need to handle it
here; we simply forgot when we added it.

Fixes Piglit's EXT_shader_integer_mix/{vs,fs}-mix-if-bool.

Signed-off-by: Kenneth Graunke <kenneth@whitecape.org>
Reviewed-by: Matt Turner <mattst88@gmail.com>
Cc: mesa-stable@lists.freedesktop.org
2014-09-03 17:12:03 -07:00
Kenneth Graunke
f92fbd554f i965: Move curb_read_length/total_scratch to brw_stage_prog_data.
All shader stages have these fields, so it makes sense to store them in
the common base structure, rather than duplicating them in each.

Signed-off-by: Kenneth Graunke <kenneth@whitecape.org>
Reviewed-by: Jordan Justen <jordan.l.justen@intel.com>
2014-09-03 17:11:33 -07:00
Carl Worth
7528f6fd17 build: Rename md5 to checksums as part of .PHONY target
In commit 46d03d37bf I renamed a Makefile target
from md5 to checksums, (as we switched from MD5 checksums to SHA-256
checksums, so the more general name is more future proof).

But that commit missed one mention of "md5" as a dependency of the .PHONY
target. Rename that here as well.
2014-09-03 16:08:20 -07:00
tiffany
cfc42db592 glsl: fix assertion which fails for unsigned array indices.
According to the GLSL 1.40 spec, section 5.7 Structure and Array Operations:

"Array elements are accessed using an expression whose type is int or uint."

Cc: <mesa-stable@lists.freedesktop.org>
Reviewed-by: Brian Paul <brianp@vmware.com>
2014-09-03 13:52:39 -06:00
Jason Ekstrand
11ee9a4d99 i965/copy_image: Divide the x offsets by block width when using the blitter
Signed-off-by: Jason Ekstrand <jason.ekstrand@intel.com>
Cc: "10.3" <mesa-stable@lists.freedesktop.org>
Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=82804
Tested-by: Tapani Pälli <tapani.palli@intel.com>
Reviewed-by: Matt Turner <mattst88@gmail.com>
2014-09-03 12:27:19 -07:00
Jason Ekstrand
499acf6e4a i965/copy_image: Use the correct block dimension
Signed-off-by: Jason Ekstrand <jason.ekstrand@intel.com>
Cc: "10.3" <mesa-stable@lists.freedesktop.org>
Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=82804
Tested-by: Tapani Pälli <tapani.palli@intel.com>
Reviewed-by: Matt Turner <mattst88@gmail.com>
2014-09-03 12:27:19 -07:00
Jason Ekstrand
b608cd7fbf meta/copy_image: Use the correct texture level when creating views
Previously, we were accidentally assuming that the level of both textures
was 0.  Now we actually use the correct level in our hacked texture view.
This doesn't 100% fix the meta path because the texture type is getting
lost somewhere in the pipeline.  However, it actually copies to/from the
correct layer now.

Signed-off-by: Jason Ekstrand <jason.ekstrand@intel.com>
Cc: "10.3" <mesa-stable@lists.freedesktop.org>
Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=82804
Tested-by: Tapani Pälli <tapani.palli@intel.com>
Reviewed-by: Matt Turner <mattst88@gmail.com>
2014-09-03 12:27:19 -07:00
Jason Ekstrand
fcb6d5b9ef i965/copy_image: Use the correct texture level
Previously, we were using the source images level for both source and
destination.  Also, we weren't taking the MinLevel from a potential texture
view into account.  This commit fixes both problems.

Signed-off-by: Jason Ekstrand <jason.ekstrand@intel.com>
Cc: "10.3" <mesa-stable@lists.freedesktop.org>
Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=82804
Tested-by: Tapani Pälli <tapani.palli@intel.com>
Reviewed-by: Matt Turner <mattst88@gmail.com>
2014-09-03 12:27:19 -07:00
Michel Dänzer
58b386dce4 gallivm: Fix build against LLVM SVN >= r216982
Only MCJIT is available anymore.

Reviewed-by: Roland Scheidegger <sroland@vmware.com>
Signed-off-by: Michel Dänzer <michel.daenzer@amd.com>
2014-09-03 09:15:01 -07:00
Marek Olšák
8abdc3c4a9 r600g: fix alpha-test with HyperZ enabled, fixing L4D2 tree corruption
*_update_db_shader_control depends on the alpha test state. The problem was
it was in a block which is only entered if the pixel shader is changed.

Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=74863

Cc: mesa-stable@lists.freedesktop.org
Tested-by: Benjamin Bellec <b.bellec@gmail.com>
Reviewed-by: Michel Dänzer <michel.daenzer@amd.com>
2014-09-03 11:50:21 +02:00
Michel Dänzer
2adf7ee92e r600g,radeonsi: Preserve existing buffer flags
The default case was accidentally clearing RADEON_FLAG_CPU_ACCESS from the
previous fall-through cases.

Reported-by: Mathias Fröhlich <Mathias.Froehlich@gmx.net>
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
2014-09-03 12:49:59 +09:00
Jason Ekstrand
454aab45ef main: Don't leak temporary texture rows
Reviewed-by: Dave Airlie <airlied@gmail.com>
Reviewed-by: Anuj Phogat <anuj.phogat@gmail.com>
2014-09-02 15:50:27 -07:00
Dave Airlie
8380b894ad r300g: pointless assignment of info.indexed
Did this code mean to do something else, you tell me!

Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Signed-off-by: Dave Airlie <airlied@redhat.com>
2014-09-03 07:59:09 +10:00
Dave Airlie
2b24e58310 omx/h264: remove stray semicolon after if
Coverity reported this, looks wrong to me.

Reviewed-by: Christian König <christian.koenig@amd.com>
Signed-off-by: Dave Airlie <airlied@redhat.com>
2014-09-03 07:58:58 +10:00
Dave Airlie
f4ccf687a6 vdpau: unlock the mutex on error paths in attribute setting.
Coverity pointed out we never dropped the lock here, so fix
it by using a common exit path.

Reviewed-by: Christian König <christian.koenig@amd.com>
Signed-off-by: Dave Airlie <airlied@redhat.com>
2014-09-03 07:58:50 +10:00
Eric Anholt
2da9118852 u_primconvert: Use u_upload_mgr for our little IB allocations.
tex-miplevel-selection was hammering my memory manager with primconverts
on individual quads.  This gets all those converted IBs packed into larger
IBs.

Reviewed-by: Rob Clark <robclark@freedesktop.org>
2014-09-02 13:55:15 -07:00
Eric Anholt
6720d1573a u_primconvert: Shut up compiler warning.
gcc isn't detecting that src is set before used, since both are under if
(info->indexed).

Reviewed-by: Rob Clark <robclark@freedesktop.org>
2014-09-02 13:55:15 -07:00
Eric Anholt
1718ba30e5 gbm: Fix gallium build when X11 is in a non-system directory
pipe-loader.h will include Xlib.h when HAVE_PIPE_LOADER_XLIB is set in the
build.

Reviewed-by: Emil Velikov <emil.l.velikov@gmail.com>
2014-09-02 13:48:54 -07:00
Eric Anholt
d71a9b7d9d vc4: Handle a couple of the transfer map flags.
This is part of fixing extremely long runtimes on some piglit tests that
involve streaming vertex reuploads due to format conversions, and will
similarly be important for X performance, which relies on these flags.
2014-09-02 12:10:56 -07:00
Kristian Høgsberg
8f55174fbd meta: Make MESA_META_DRAW_BUFFERS restore properly
A meta begin/end pair with MESA_META_DRAW_BUFFERS will change visible GL
state.  We recreate the draw buffer enums from the buffer bitfield, which
changes GL_BACK to GL_BACK_LEFT (and GL_FRONT to GL_FRONT_LEFT).

This commit modifes the save/restore logic to instead copy the buffer enums
from the gl_framebuffer and then set them on restore using
_mesa_drawbuffers().

It's not clear how this breaks the benchmark in 82796, but fixing meta to not
leak the state change fixes the regression.

No piglit regressions.

Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Fixes: https://bugs.freedesktop.org/show_bug.cgi?id=82796
Signed-off-by: Kristian Høgsberg <krh@bitplanet.net>
Cc: mesa-stable@lists.freedesktop.org
2014-09-02 10:33:13 -07:00
Emil Velikov
5a4e0f3873 Revert "mesa: fix make tarballs"
This reverts commit 0fbb9a599d.

Rather than adding hacks around the issue drop the sources from the
final tarball, and re-add them back with 'make dist'. This fixes a
problem when running parallel 'make install' fails as it recreates
sources and triggers partial recompilation.

Cc: "10.2 10.3" <mesa-stable@lists.freedesktop.org>
Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=83355
Reported-by: Maarten Lankhorst <maarten.lankhorst@canonical.com>
Signed-off-by: Emil Velikov <emil.l.velikov@gmail.com>
Tested-by: Maarten Lankhorst <maarten.lankhorst@canonical.com>
Tested-by: Kai Wasserbäch <kai@dev.carbon-project.org>
2014-09-02 11:39:29 +01:00
Dave Airlie
021e84f292 mesa/program_cache: calloc the correct size for the cache.
Coverity reported this, and I think this is the right solution,
since cache->items is struct cache_item ** not struct cache_item *,
we also realloc it using struct cache_item * at some point.

Reviewed-by: Tapani Pälli <tapani.palli@intel.com>
Signed-off-by: Dave Airlie <airlied@redhat.com>
2014-09-02 16:42:24 +10:00
Michel Dänzer
a75fee78c6 radeonsi: Compile dummy pixel shader on demand
It's never used under normal circumstances.

Reviewed-by: Marek Olšák <marek.olsak@amd.com>
2014-09-02 15:24:07 +09:00
Michel Dänzer
b84b9eae20 u_blitter: Create all shaders on demand
Not all of these are used in every context, so this can make a
significant difference for short-lived contexts such as in piglit tests.

Reviewed-by: Marek Olšák <marek.olsak@amd.com>
2014-09-02 15:24:07 +09:00
Michel Dänzer
51131c423c r600g,radeonsi: Inform the kernel if a BO will likely be accessed by the CPU
This allows the kernel to prevent such BOs from ever being stored in the
CPU inaccessible part of VRAM.

Reviewed-by: Marek Olšák <marek.olsak@amd.com>
2014-09-02 15:24:07 +09:00
Dave Airlie
2d5d1f5598 glsl: free uniform_map on failure path.
If we fails in reserve_explicit_locations, we leak uniform_map.

Reported-by: coverity scanner.

Reviewed-by: Tapani Pälli <tapani.palli@intel.com>
Signed-off-by: Dave Airlie <airlied@redhat.com>
2014-09-02 16:05:52 +10:00
Paul Berry
9f20503658 main/cs: Add gl_context::ComputeProgram
Reviewed-by: Jordan Justen <jordan.l.justen@intel.com>
2014-09-01 19:38:27 -07:00
Jordan Justen
d035d50e05 mesa: Convert NewDriverState to 64-bits
i965 will have more than 32 bits when BRW_STATE_COMPUTE_PROGRAM is added.

Signed-off-by: Jordan Justen <jordan.l.justen@intel.com>
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
2014-09-01 19:38:27 -07:00
Paul Berry
8e27a4d2b3 i965: Modify state upload to allow 2 different sets of state atoms.
The set of state atoms for compute shaders is currently empty; it will
be filled in by future patches.

Reviewed-by: Jordan Justen <jordan.l.justen@intel.com>
2014-09-01 19:38:27 -07:00
Paul Berry
373143ed91 i965: Modify dirty bit handling to support 2 pipelines.
The hardware state for compute shaders is almost entirely orthogonal
to the hardware state for 3D rendering.  To avoid sending unnecessary
state to the hardware, we'll need to have a separate set of state
atoms for the compute pipeline and the 3D pipeline.  That means we
need to maintain two separate sets of dirty bits to determine which
state atoms need to be run.

But the dirty bits are not completely independent; for example, if
BRW_NEW_SURFACES is flagged while doing 3D rendering, then not only do
we need to re-run 3D state atoms that depend on BRW_NEW_SURFACES, but
we also need to re-run compute state atoms that depend on
BRW_NEW_SURFACES.  But we'll also need to re-run those state atoms the
next time the compute pipeline is run.

To accomplish this, we record two sets of dirty bits, one for each
pipeline.  When bits are dirtied (via SET_DIRTY_BIT() or
SET_DIRTY_ALL()) we set them to the dirty state in both pipelines.
When brw_state_upload() is run, we clear the dirty bits just for the
pipeline that was run.

Note that since the number of pipelines is known at compile time to be
2, the compiler should unroll the loops in SET_DIRTY_BIT() and
SET_DIRTY_ALL().

Reviewed-by: Jordan Justen <jordan.l.justen@intel.com>
2014-09-01 19:38:27 -07:00
Paul Berry
c5bdf9be1e i965: Create a macro for checking a dirty bit.
This will make it easier to extend dirty bit handling to support
compute shaders.

Reviewed-by: Jordan Justen <jordan.l.justen@intel.com>
2014-09-01 19:38:27 -07:00
Paul Berry
6f56e1424d i965: Create a macro for setting all dirty bits.
This will make it easier to extend dirty bit handling to support
compute shaders.

Reviewed-by: Jordan Justen <jordan.l.justen@intel.com>
2014-09-01 19:38:27 -07:00
Paul Berry
88e3d404da i965: Create a macro for setting a dirty bit.
This will make it easier to extend dirty bit handling to support
compute shaders.

Reviewed-by: Jordan Justen <jordan.l.justen@intel.com>
2014-09-01 19:38:27 -07:00
Dave Airlie
94a909ec2d i965: add missing parens in vec4 visitor
coverity reported this, Matt said it look like missing parens,
not bad identing, so lets try that.

Cc: "10.2 10.3" <mesa-stable@lists.freedesktop.org>
Reviewed-by: Chris Forbes <chrisf@ijw.co.nz>
Signed-off-by: Dave Airlie <airlied@redhat.com>
2014-09-02 11:07:11 +10:00
Dave Airlie
19f6e80a1e nouveau: don't leak dec struct on error
This one path doesn't goto fail, so it seems to leak dec.

Reviewed-by: Ilia Mirkin <imirkin@alum.mit.edu>
Signed-off-by: Dave Airlie <airlied@redhat.com>
2014-09-02 10:08:58 +10:00
Dave Airlie
32a8b2cf54 xvmc/tests: %C isn't a valid printf specifier.
Reported-by: Coverity scanner.

Signed-off-by: Dave Airlie <airlied@redhat.com>
2014-09-02 10:07:54 +10:00
Dave Airlie
ea88b1de2f nouveau/nv40: quiten coverity warning in unused vertex texture code.
This fixes the code, but we never run it anyways, so silence coverity.

Signed-off-by: Dave Airlie <airlied@redhat.com>
2014-09-02 10:04:29 +10:00
Ilia Mirkin
d0cd86686d nv50: remove unused variables
Recent code changes have caused these to no longer be used. Remove them.

Signed-off-by: Ilia Mirkin <imirkin@alum.mit.edu>
2014-09-01 18:47:42 -04:00
Ilia Mirkin
0c38006b55 mesa: force height of 1D textures to be 1 in texture views
Signed-off-by: Ilia Mirkin <imirkin@alum.mit.edu>
Reviewed-by: Chris Forbes <chrisf@ijw.co.nz>
2014-09-01 18:38:02 -04:00
Ilia Mirkin
2c44043313 nv50: attach the buffer bo to the miptree structures
The current code... makes no sense. Use nouveau_bo_ref to attach the bo
to the exposed resource so as to have the proper lifetime guarantees.

Tested-by: Emil Velikov <emil.l.velikov@gmail.com>
Signed-off-by: Ilia Mirkin <imirkin@alum.mit.edu>
Cc: "10.2 10.3" <mesa-stable@lists.freedesktop.org>
2014-09-01 18:38:02 -04:00
Ilia Mirkin
9d52e551a5 nv50: mt address may not be the underlying bo's start address
With VP2, nv50_miptree is faked because the underlying bo's have to be
laid out in a certain way. This is done by adjusting the address. Make
sure that blits (and everything else for consistency) use the mt address
rather than the bo address as a base.

This fixes retrieving chroma plane with VDPAU.

Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=82255
Tested-by: Emil Velikov <emil.l.velikov@gmail.com>
Signed-off-by: Ilia Mirkin <imirkin@alum.mit.edu>
Cc: "10.2 10.3" <mesa-stable@lists.freedesktop.org>
2014-09-01 18:38:02 -04:00
Ilia Mirkin
2528d402b9 nv50: set the miptree address when clearing bo's in vp2 init
The mt address is about to be used more, make sure it's set
appropriately.

Reported-by: Emil Velikov <emil.l.velikov@gmail.com>
Tested-by: Emil Velikov <emil.l.velikov@gmail.com>
Signed-off-by: Ilia Mirkin <imirkin@alum.mit.edu>
Cc: "10.2 10.3" <mesa-stable@lists.freedesktop.org>
2014-09-01 18:38:02 -04:00
Ilia Mirkin
6c2b079231 nv50/ir: avoid creating instructions that can't be emitted
When constant folding a MAD operation, we first fold the multiply and
generate an ADD. However we do so without making sure that the immediate
can be handled in the saturate case. If it can't, load the immediate in
a separate instruction.

Reported-by: Tiziano Bacocco <tizbac2@gmail.com>
Signed-off-by: Ilia Mirkin <imirkin@alum.mit.edu>
Cc: "10.2 10.3" <mesa-stable@lists.freedesktop.org>
2014-09-01 18:38:02 -04:00
Ilia Mirkin
115d9a5525 nvc0: don't make 1d staging textures linear
Experimentally, the sampler doesn't appear to like these, neither as
buffer nor as rect textures. So remove 1D from the list of texture types
to make linear when used for staging.

This fixes the OSD in mplayer for VDPAU.

Signed-off-by: Ilia Mirkin <imirkin@alum.mit.edu>
Cc: "10.2 10.3" <mesa-stable@lists.freedesktop.org>
2014-09-01 18:38:02 -04:00
Ilia Mirkin
362cd26960 nv50: zero out unbound samplers
Samplers are only defined up to num_samplers, so set all samplers above
nr to NULL so that we don't try to read them again later.

Tested-by: Christian Ruppert <idl0r@qasl.de>
Signed-off-by: Ilia Mirkin <imirkin@alum.mit.edu>
Cc: "10.2 10.3" <mesa-stable@lists.freedesktop.org>
2014-09-01 18:38:02 -04:00
Ilia Mirkin
c4bb436f76 nvc0/ir: avoid infinite recursion when finding first uses of tex
In certain circumstances, findFirstUses could end up doubling back on
instructions it had already processed, resulting in an infinite
recursion. Avoid this by keeping track of already-visited instructions.

Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=83079
Tested-by: Tobias Klausmann <tobias.johannes.klausmann@mni.thm.de>
Signed-off-by: Ilia Mirkin <imirkin@alum.mit.edu>
Cc: "10.2 10.3" <mesa-stable@lists.freedesktop.org>
2014-09-01 18:38:02 -04:00