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radeonsi: don't do BREAK_BATCH for context regs with only 1 context per batch

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because it has no effect

Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23517>
This commit is contained in:
Marek Olšák 2023-06-10 21:41:49 -04:00 • committed by Marge Bot
parent 835190dd9f
commit fff585bdb8
1 changed files with 4 additions and 2 deletions
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6
src/gallium/drivers/radeonsi/si_state.c
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@ -72,7 +72,8 @@ static void si_emit_cb_render_state(struct si_context *sctx)
/* GFX9: Flush DFSM when CB_TARGET_MASK changes.
* I think we don't have to do anything between IBs.
*/
if (sctx->screen->dpbb_allowed && sctx->last_cb_target_mask != cb_target_mask) {
if (sctx->screen->dpbb_allowed && sctx->last_cb_target_mask != cb_target_mask &&
sctx->screen->pbb_context_states_per_bin > 1) {
sctx->last_cb_target_mask = cb_target_mask;
radeon_begin(cs);
@ -3550,7 +3551,8 @@ static void si_emit_framebuffer_state(struct si_context *sctx)
radeon_set_context_reg(R_028208_PA_SC_WINDOW_SCISSOR_BR,
S_028208_BR_X(state->width) | S_028208_BR_Y(state->height));
if (sctx->screen->dpbb_allowed) {
if (sctx->screen->dpbb_allowed &&
sctx->screen->pbb_context_states_per_bin > 1) {
radeon_emit(PKT3(PKT3_EVENT_WRITE, 0, 0));
radeon_emit(EVENT_TYPE(V_028A90_BREAK_BATCH) | EVENT_INDEX(0));
}