diff --git a/src/compiler/spirv/spirv_to_nir.c b/src/compiler/spirv/spirv_to_nir.c index 05ccce54db6..9101274b3a4 100644 --- a/src/compiler/spirv/spirv_to_nir.c +++ b/src/compiler/spirv/spirv_to_nir.c @@ -103,6 +103,7 @@ static const struct spirv_capabilities implemented_capabilities = { .GroupNonUniformShuffleRelative = true, .GroupNonUniformVote = true, .Groups = true, + .GroupUniformArithmeticKHR = true, .Image1D = true, .ImageBasic = true, .ImageBuffer = true, @@ -6629,6 +6630,14 @@ vtn_handle_body_instruction(struct vtn_builder *b, SpvOp opcode, case SpvOpGroupFMax: case SpvOpGroupUMax: case SpvOpGroupSMax: + case SpvOpGroupIMulKHR: + case SpvOpGroupFMulKHR: + case SpvOpGroupBitwiseAndKHR: + case SpvOpGroupBitwiseOrKHR: + case SpvOpGroupBitwiseXorKHR: + case SpvOpGroupLogicalAndKHR: + case SpvOpGroupLogicalOrKHR: + case SpvOpGroupLogicalXorKHR: case SpvOpSubgroupBallotKHR: case SpvOpSubgroupFirstInvocationKHR: case SpvOpSubgroupReadInvocationKHR: diff --git a/src/compiler/spirv/vtn_subgroup.c b/src/compiler/spirv/vtn_subgroup.c index 2df49bd55c0..fed8e00710e 100644 --- a/src/compiler/spirv/vtn_subgroup.c +++ b/src/compiler/spirv/vtn_subgroup.c @@ -414,6 +414,14 @@ vtn_handle_subgroup(struct vtn_builder *b, SpvOp opcode, case SpvOpGroupFMax: case SpvOpGroupUMax: case SpvOpGroupSMax: + case SpvOpGroupIMulKHR: + case SpvOpGroupFMulKHR: + case SpvOpGroupBitwiseAndKHR: + case SpvOpGroupBitwiseOrKHR: + case SpvOpGroupBitwiseXorKHR: + case SpvOpGroupLogicalAndKHR: + case SpvOpGroupLogicalOrKHR: + case SpvOpGroupLogicalXorKHR: case SpvOpGroupIAddNonUniformAMD: case SpvOpGroupFAddNonUniformAMD: case SpvOpGroupFMinNonUniformAMD: @@ -434,9 +442,11 @@ vtn_handle_subgroup(struct vtn_builder *b, SpvOp opcode, case SpvOpGroupFAddNonUniformAMD: reduction_op = nir_op_fadd; break; + case SpvOpGroupIMulKHR: case SpvOpGroupNonUniformIMul: reduction_op = nir_op_imul; break; + case SpvOpGroupFMulKHR: case SpvOpGroupNonUniformFMul: reduction_op = nir_op_fmul; break; @@ -470,14 +480,20 @@ vtn_handle_subgroup(struct vtn_builder *b, SpvOp opcode, case SpvOpGroupFMaxNonUniformAMD: reduction_op = nir_op_fmax; break; + case SpvOpGroupBitwiseAndKHR: + case SpvOpGroupLogicalAndKHR: case SpvOpGroupNonUniformBitwiseAnd: case SpvOpGroupNonUniformLogicalAnd: reduction_op = nir_op_iand; break; + case SpvOpGroupBitwiseOrKHR: + case SpvOpGroupLogicalOrKHR: case SpvOpGroupNonUniformBitwiseOr: case SpvOpGroupNonUniformLogicalOr: reduction_op = nir_op_ior; break; + case SpvOpGroupBitwiseXorKHR: + case SpvOpGroupLogicalXorKHR: case SpvOpGroupNonUniformBitwiseXor: case SpvOpGroupNonUniformLogicalXor: reduction_op = nir_op_ixor;