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radv: change the BASE_HI field for VGT_TF_MEMORY_BASE_HI on GFX12

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It's similar but less confusing.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/33015>
This commit is contained in:
Samuel Pitoiset 2025-01-13 07:20:33 -08:00 • committed by Marge Bot
parent 401b400de3
commit fc56823cf0
1 changed files with 1 additions and 1 deletions
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2
src/amd/vulkan/radv_queue.c
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@ -408,7 +408,7 @@ radv_emit_tess_factor_ring(struct radv_device *device, struct radeon_cmdbuf *cs,
radeon_set_uconfig_reg(cs, R_030940_VGT_TF_MEMORY_BASE, tf_va >> 8);
if (pdev->info.gfx_level >= GFX12) {
radeon_set_uconfig_reg(cs, R_03099C_VGT_TF_MEMORY_BASE_HI, S_030984_BASE_HI(tf_va >> 40));
radeon_set_uconfig_reg(cs, R_03099C_VGT_TF_MEMORY_BASE_HI, S_03099C_BASE_HI(tf_va >> 40));
} else if (pdev->info.gfx_level >= GFX10) {
radeon_set_uconfig_reg(cs, R_030984_VGT_TF_MEMORY_BASE_HI, S_030984_BASE_HI(tf_va >> 40));
} else if (pdev->info.gfx_level == GFX9) {