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aco: fix nir_op_pack_32_2x16_split if one operand is a constant

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Because 16-bit constants are represented with the s1 RegClass, we
have to extract the low half.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Daniel Schürmann <daniel@schuermann.dev>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4509>
This commit is contained in:
Samuel Pitoiset 2020-04-04 10:07:51 +02:00 • committed by Marge Bot
parent 4cfaef68d7
commit fc1068de0d
1 changed files with 2 additions and 0 deletions
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2
src/amd/compiler/aco_instruction_selection.cpp
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@ -2771,6 +2771,8 @@ void visit_alu_instr(isel_context *ctx, nir_alu_instr *instr)
Temp src0 = get_alu_src(ctx, instr->src[0]);
Temp src1 = get_alu_src(ctx, instr->src[1]);
if (dst.regClass() == v1) {
src0 = emit_extract_vector(ctx, src0, 0, v2b);
src1 = emit_extract_vector(ctx, src1, 0, v2b);
bld.pseudo(aco_opcode::p_create_vector, Definition(dst), src0, src1);
} else {
src0 = bld.sop2(aco_opcode::s_and_b32, bld.def(s1), bld.def(s1, scc), src0, Operand(0xFFFFu));