mirror of
https://gitlab.freedesktop.org/mesa/mesa.git
synced 2026-06-20 23:28:23 +02:00
radv: merge radv_shader_stage_key for combined ahit/isec shaders
This should be done if the any-hit enables robustness but the intersection does not. Signed-off-by: Rhys Perry <pendingchaos02@gmail.com> Reviewed-by: Konstantin Seurer <konstantin.seurer@gmail.com> Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/42175>
This commit is contained in:
parent
ec21d14a30
commit
fc02ffed24
3 changed files with 30 additions and 0 deletions
|
|
@ -168,6 +168,31 @@ radv_pipeline_get_shader_key(const struct radv_compiler_info *compiler_info,
|
|||
return key;
|
||||
}
|
||||
|
||||
void
|
||||
radv_merge_shader_stage_key(struct radv_shader_stage_key *dst, const struct radv_shader_stage_key *src)
|
||||
{
|
||||
assert(dst->subgroup_required_size == src->subgroup_required_size);
|
||||
assert(dst->view_index_from_device_index == src->view_index_from_device_index);
|
||||
assert(dst->descriptor_heap == src->descriptor_heap);
|
||||
assert(dst->version == src->version);
|
||||
assert(dst->has_task_shader == src->has_task_shader);
|
||||
|
||||
dst->subgroup_require_full |= src->subgroup_require_full;
|
||||
dst->subgroup_allow_varying &= src->subgroup_allow_varying;
|
||||
|
||||
dst->storage_robustness2 |= src->storage_robustness2;
|
||||
dst->uniform_robustness2 |= src->uniform_robustness2;
|
||||
dst->vertex_robustness1 |= src->vertex_robustness1;
|
||||
dst->coop_matrix_storage_robustness |= src->coop_matrix_storage_robustness;
|
||||
dst->coop_matrix_uniform_robustness |= src->coop_matrix_uniform_robustness;
|
||||
|
||||
dst->optimisations_disabled |= src->optimisations_disabled;
|
||||
dst->keep_statistic_info |= src->keep_statistic_info;
|
||||
dst->keep_executable_info |= src->keep_executable_info;
|
||||
dst->keep_shader_arg_info |= src->keep_shader_arg_info;
|
||||
dst->indirect_bindable |= src->indirect_bindable;
|
||||
}
|
||||
|
||||
void
|
||||
radv_pipeline_stage_init(VkPipelineCreateFlags2 pipeline_flags, const VkPipelineShaderStageCreateInfo *sinfo,
|
||||
const struct radv_pipeline_layout *pipeline_layout,
|
||||
|
|
|
|||
|
|
@ -86,6 +86,8 @@ struct radv_shader_stage_key radv_pipeline_get_shader_key(const struct radv_comp
|
|||
const VkPipelineShaderStageCreateInfo *stage,
|
||||
VkPipelineCreateFlags2 flags, const void *pNext);
|
||||
|
||||
void radv_merge_shader_stage_key(struct radv_shader_stage_key *dst, const struct radv_shader_stage_key *src);
|
||||
|
||||
void radv_pipeline_stage_init(VkPipelineCreateFlags2 pipeline_flags, const VkPipelineShaderStageCreateInfo *sinfo,
|
||||
const struct radv_pipeline_layout *layout, const struct radv_shader_stage_key *stage_key,
|
||||
struct radv_shader_stage *out_stage);
|
||||
|
|
|
|||
|
|
@ -860,7 +860,10 @@ radv_rt_compile_shaders(struct radv_device *device, struct vk_pipeline_cache *ca
|
|||
.nir = final_shader,
|
||||
.key = rt_stages[isec ? isec_idx : ahit_idx].key,
|
||||
};
|
||||
if (isec && ahit)
|
||||
radv_merge_shader_stage_key(&combined_stage.key, &rt_stages[ahit_idx].key);
|
||||
radv_shader_layout_init(pipeline_layout, final_shader->info.stage, &combined_stage.layout);
|
||||
|
||||
uint32_t stack_size = 0;
|
||||
struct radv_serialized_shader_arena_block *replay_block =
|
||||
capture_replay_handles[idx].arena_va ? &capture_replay_handles[idx] : NULL;
|
||||
|
|
|
|||
Loading…
Add table
Reference in a new issue