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ci/radeonsi: Mark a glx_arb_sync_control/timing flake.

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I've seen this one happen at least twice today. Log shows something like:

    Wallclock time between MSCs 16982.888889us does not match
    glXGetMscRateOML 16668.071966us

or

    Wallclock time between MSCs 16500.333333us does not match
    glXGetMscRateOML 16668.071966us

Incidentally, both runs I've looked into had one run too fast and one run
too slow.

Acked-by: Adam Jackson <ajax@redhat.com>
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/10414>
This commit is contained in:
Eric Anholt 2021-04-22 15:02:20 -07:00
parent aed18bca64
commit f9d57207a3
1 changed files with 1 additions and 0 deletions
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src/gallium/drivers/radeonsi/ci/piglit-radeonsi-stoney-flakes.txt Normal file
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glx@glx_arb_sync_control@timing -fullscreen -divisor 2