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radv: Stop assigning linked driver locations.

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The ac/nir passes are now able to map memory locations for the I/O
intrinsics without relying on driver location (intrinsic base).

Signed-off-by: Timur Kristóf <timur.kristof@gmail.com>
Reviewed-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29812>
This commit is contained in:
Timur Kristóf 2024-06-20 17:27:53 +02:00 • committed by Marge Bot
parent d43466e917
commit f917b81665
1 changed files with 9 additions and 9 deletions
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18
src/amd/vulkan/radv_pipeline_graphics.c
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@ -1281,20 +1281,20 @@ radv_link_vs(const struct radv_device *device, struct radv_shader_stage *vs_stag
}
if (next_stage && next_stage->nir->info.stage == MESA_SHADER_TESS_CTRL) {
nir_linked_io_var_info vs2tcs = nir_assign_linked_io_var_locations(vs_stage->nir, next_stage->nir);
const unsigned num_reserved_slots = util_bitcount64(next_stage->nir->info.inputs_read);
vs_stage->info.vs.num_linked_outputs = vs2tcs.num_linked_io_vars;
vs_stage->info.vs.num_linked_outputs = num_reserved_slots;
vs_stage->info.outputs_linked = true;
next_stage->info.tcs.num_linked_inputs = vs2tcs.num_linked_io_vars;
next_stage->info.tcs.num_linked_inputs = num_reserved_slots;
next_stage->info.inputs_linked = true;
} else if (next_stage && next_stage->nir->info.stage == MESA_SHADER_GEOMETRY) {
nir_linked_io_var_info vs2gs = nir_assign_linked_io_var_locations(vs_stage->nir, next_stage->nir);
const unsigned num_reserved_slots = util_bitcount64(next_stage->nir->info.inputs_read);
vs_stage->info.vs.num_linked_outputs = vs2gs.num_linked_io_vars;
vs_stage->info.vs.num_linked_outputs = num_reserved_slots;
vs_stage->info.outputs_linked = true;
next_stage->info.gs.num_linked_inputs = vs2gs.num_linked_io_vars;
next_stage->info.gs.num_linked_inputs = num_reserved_slots;
next_stage->info.inputs_linked = true;
}
}
@ -1354,12 +1354,12 @@ radv_link_tes(const struct radv_device *device, struct radv_shader_stage *tes_st
}
if (next_stage && next_stage->nir->info.stage == MESA_SHADER_GEOMETRY) {
nir_linked_io_var_info tes2gs = nir_assign_linked_io_var_locations(tes_stage->nir, next_stage->nir);
const unsigned num_reserved_slots = util_bitcount64(next_stage->nir->info.inputs_read);
tes_stage->info.tes.num_linked_outputs = tes2gs.num_linked_io_vars;
tes_stage->info.tes.num_linked_outputs = num_reserved_slots;
tes_stage->info.outputs_linked = true;
next_stage->info.gs.num_linked_inputs = tes2gs.num_linked_io_vars;
next_stage->info.gs.num_linked_inputs = num_reserved_slots;
next_stage->info.inputs_linked = true;
}
}