From f917b816651b118b745c84351a981b64d32c81a5 Mon Sep 17 00:00:00 2001 From: =?UTF-8?q?Timur=20Krist=C3=B3f?= Date: Thu, 20 Jun 2024 17:27:53 +0200 Subject: [PATCH] radv: Stop assigning linked driver locations. MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit The ac/nir passes are now able to map memory locations for the I/O intrinsics without relying on driver location (intrinsic base). Signed-off-by: Timur Kristóf Reviewed-by: Alyssa Rosenzweig Reviewed-by: Marek Olšák Reviewed-by: Samuel Pitoiset Part-of: --- src/amd/vulkan/radv_pipeline_graphics.c | 18 +++++++++--------- 1 file changed, 9 insertions(+), 9 deletions(-) diff --git a/src/amd/vulkan/radv_pipeline_graphics.c b/src/amd/vulkan/radv_pipeline_graphics.c index 57a130e536f..26964513f4f 100644 --- a/src/amd/vulkan/radv_pipeline_graphics.c +++ b/src/amd/vulkan/radv_pipeline_graphics.c @@ -1281,20 +1281,20 @@ radv_link_vs(const struct radv_device *device, struct radv_shader_stage *vs_stag } if (next_stage && next_stage->nir->info.stage == MESA_SHADER_TESS_CTRL) { - nir_linked_io_var_info vs2tcs = nir_assign_linked_io_var_locations(vs_stage->nir, next_stage->nir); + const unsigned num_reserved_slots = util_bitcount64(next_stage->nir->info.inputs_read); - vs_stage->info.vs.num_linked_outputs = vs2tcs.num_linked_io_vars; + vs_stage->info.vs.num_linked_outputs = num_reserved_slots; vs_stage->info.outputs_linked = true; - next_stage->info.tcs.num_linked_inputs = vs2tcs.num_linked_io_vars; + next_stage->info.tcs.num_linked_inputs = num_reserved_slots; next_stage->info.inputs_linked = true; } else if (next_stage && next_stage->nir->info.stage == MESA_SHADER_GEOMETRY) { - nir_linked_io_var_info vs2gs = nir_assign_linked_io_var_locations(vs_stage->nir, next_stage->nir); + const unsigned num_reserved_slots = util_bitcount64(next_stage->nir->info.inputs_read); - vs_stage->info.vs.num_linked_outputs = vs2gs.num_linked_io_vars; + vs_stage->info.vs.num_linked_outputs = num_reserved_slots; vs_stage->info.outputs_linked = true; - next_stage->info.gs.num_linked_inputs = vs2gs.num_linked_io_vars; + next_stage->info.gs.num_linked_inputs = num_reserved_slots; next_stage->info.inputs_linked = true; } } @@ -1354,12 +1354,12 @@ radv_link_tes(const struct radv_device *device, struct radv_shader_stage *tes_st } if (next_stage && next_stage->nir->info.stage == MESA_SHADER_GEOMETRY) { - nir_linked_io_var_info tes2gs = nir_assign_linked_io_var_locations(tes_stage->nir, next_stage->nir); + const unsigned num_reserved_slots = util_bitcount64(next_stage->nir->info.inputs_read); - tes_stage->info.tes.num_linked_outputs = tes2gs.num_linked_io_vars; + tes_stage->info.tes.num_linked_outputs = num_reserved_slots; tes_stage->info.outputs_linked = true; - next_stage->info.gs.num_linked_inputs = tes2gs.num_linked_io_vars; + next_stage->info.gs.num_linked_inputs = num_reserved_slots; next_stage->info.inputs_linked = true; } }