Merge branch 'kk-post-depth-coverage' into 'main'

kk: Support VK_EXT_post_depth_coverage

See merge request mesa/mesa!41283
This commit is contained in:
squidbus 2026-05-07 23:15:05 +00:00
commit f4f1a1508e
5 changed files with 35 additions and 6 deletions

View file

@ -671,7 +671,7 @@ Khronos extensions that are not part of any Vulkan version:
VK_EXT_pci_bus_info DONE (anv, hasvk, nvk, radv, vn)
VK_EXT_physical_device_drm DONE (anv, hasvk, hk, nvk, panvk, pvr, radv, tu, v3dv, vn)
VK_EXT_pipeline_library_group_handles DONE (anv, lvp, radv, vn)
VK_EXT_post_depth_coverage DONE (anv/gfx11+, lvp, nvk, radv/gfx10+, tu, vn)
VK_EXT_post_depth_coverage DONE (anv/gfx11+, kk, lvp, nvk, radv/gfx10+, tu, vn)
VK_EXT_present_timing DONE (anv, hk, nvk, radv, tu, panvk)
VK_EXT_primitive_restart_index DONE (lvp, radv)
VK_EXT_primitive_topology_list_restart DONE (anv, hasvk, lvp, nvk, panvk, radv, tu, v3dv, vn, nvk)

View file

@ -369,6 +369,15 @@ lower_sample_shading(nir_builder *b, nir_intrinsic_instr *intr, void *data)
return true;
}
if (intr->intrinsic == nir_intrinsic_load_sample_mask_in) {
b->cursor = nir_after_instr(&intr->instr);
nir_def *sample_id = nir_load_sample_id(b);
nir_def *sample_bit = nir_ishl(b, nir_imm_int(b, 1), sample_id);
nir_def *sample_mask_bit = nir_iand(b, &intr->def, sample_bit);
nir_def_rewrite_uses_after(&intr->def, sample_mask_bit);
return true;
}
if (intr->intrinsic != nir_intrinsic_load_interpolated_input)
return false;

View file

@ -62,14 +62,24 @@ static const char *sysval_table[SYSTEM_VALUE_MAX] = {
"uint mtl_AmplificationID [[amplification_id]]",
[SYSTEM_VALUE_FIRST_VERTEX] = "uint gl_FirstVertex [[base_vertex]]",
};
static const char *sysval_sample_mask_in_post_depth_coverage =
"uint gl_SampleMask [[sample_mask, post_depth_coverage]]";
static void
emit_sysvals(struct nir_to_msl_ctx *ctx, nir_shader *shader)
{
unsigned i;
BITSET_FOREACH_SET(i, shader->info.system_values_read, SYSTEM_VALUE_MAX) {
assert(sysval_table[i]);
P_IND(ctx, "%s,\n", sysval_table[i]);
const char *sysval;
if (i == SYSTEM_VALUE_SAMPLE_MASK_IN &&
ctx->shader->info.stage == MESA_SHADER_FRAGMENT &&
ctx->shader->info.fs.post_depth_coverage)
sysval = sysval_sample_mask_in_post_depth_coverage;
else
sysval = sysval_table[i];
assert(sysval);
P_IND(ctx, "%s,\n", sysval);
}
}
@ -1005,7 +1015,7 @@ intrinsic_to_msl(struct nir_to_msl_ctx *ctx, nir_intrinsic_instr *instr)
P(ctx, "gl_SampleID;\n");
break;
case nir_intrinsic_load_sample_mask_in:
P(ctx, "gl_SampleMask & (1u << gl_SampleID);\n");
P(ctx, "gl_SampleMask;\n");
break;
case nir_intrinsic_load_sample_pos:
P(ctx, "get_sample_position(gl_SampleID);\n");

View file

@ -143,6 +143,7 @@ kk_get_device_extensions(const struct kk_instance *instance,
.EXT_image_2d_view_of_3d = true,
.EXT_load_store_op_none = true,
.EXT_mutable_descriptor_type = true,
.EXT_post_depth_coverage = true,
.EXT_shader_atomic_float = true,
.EXT_shader_replicated_composites = true,

View file

@ -127,6 +127,7 @@ struct kk_fs_key {
struct vk_depth_stencil_state ds;
uint32_t rasterization_samples;
uint16_t static_sample_mask;
bool sample_shading_enable;
bool has_depth;
};
@ -151,6 +152,7 @@ kk_populate_fs_key(struct kk_fs_key *key,
if (state->ms) {
key->rasterization_samples = state->ms->rasterization_samples;
key->static_sample_mask = state->ms->sample_mask;
key->sample_shading_enable = state->ms->sample_shading_enable;
}
/* Depth writes are removed unless there's an actual attachment */
@ -400,6 +402,9 @@ static void
kk_lower_fs(struct kk_device *dev, nir_shader *nir,
const struct vk_graphics_pipeline_state *state)
{
nir->info.fs.uses_sample_shading |= state->ms &&
state->ms->sample_shading_enable;
/* msl_nir_lower_sample_shading needs to go before blending since
* nir_lower_blend will always set uses_sample_shading to true if there's any
* output read. I believe we do not need to lower it always, that is why it
@ -440,8 +445,12 @@ kk_lower_fs(struct kk_device *dev, nir_shader *nir,
if (!nir->info.fs.early_fragment_tests) {
nir_function_impl *entrypoint = nir_shader_get_entrypoint(nir);
nir_builder b = nir_builder_at(nir_after_impl(entrypoint));
nir_discard_if(&b,
nir_ieq_imm(&b, nir_load_sample_mask_in(&b), 0u));
nir_def *sample_id = nir_load_sample_id(&b);
nir_def *sample_bit = nir_ishl(&b, nir_imm_int(&b, 1), sample_id);
nir_def *sample_mask_bit = nir_iand(&b, nir_load_sample_mask_in(&b),
sample_bit);
nir_discard_if(&b, nir_ieq_imm(&b, sample_mask_bit, 0u));
}
}
NIR_PASS(_, nir, msl_lower_static_sample_mask, state->ms->sample_mask);