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radeonsi: don't use SQ_NON_EVENT before GE_PC_ALLOC for better perf on Navi1x
SQ_NON_EVENT was originally meant to fix a perf issue on Navi1x, but using the event actually makes the perf worse. This improves perf for viewperf/snx. Acked-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/12656>
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2 changed files with 0 additions and 13 deletions
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@ -70,12 +70,6 @@ si_create_shadowing_ib_preamble(struct si_context *sctx)
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{
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struct si_pm4_state *pm4 = CALLOC_STRUCT(si_pm4_state);
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if (sctx->chip_class == GFX10) {
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/* SQ_NON_EVENT must be emitted before GE_PC_ALLOC is written. */
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si_pm4_cmd_add(pm4, PKT3(PKT3_EVENT_WRITE, 0, 0));
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si_pm4_cmd_add(pm4, EVENT_TYPE(V_028A90_SQ_NON_EVENT) | EVENT_INDEX(0));
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}
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if (sctx->screen->dpbb_allowed) {
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si_pm4_cmd_add(pm4, PKT3(PKT3_EVENT_WRITE, 0, 0));
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si_pm4_cmd_add(pm4, EVENT_TYPE(V_028A90_BREAK_BATCH) | EVENT_INDEX(0));
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@ -983,13 +983,6 @@ static void gfx10_emit_ge_pc_alloc(struct si_context *sctx, unsigned value)
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struct radeon_cmdbuf *cs = &sctx->gfx_cs;
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radeon_begin(cs);
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if (sctx->chip_class == GFX10) {
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/* SQ_NON_EVENT must be emitted before GE_PC_ALLOC is written. */
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radeon_emit(cs, PKT3(PKT3_EVENT_WRITE, 0, 0));
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radeon_emit(cs, EVENT_TYPE(V_028A90_SQ_NON_EVENT) | EVENT_INDEX(0));
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}
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radeon_set_uconfig_reg(cs, R_030980_GE_PC_ALLOC, value);
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radeon_end();
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