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ir3: Add an env var to prefer single wavesize.

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I used this for debugging an issue recently, and it seems handy to have
around.

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/41665>
This commit is contained in:
Emma Anholt 2026-05-11 15:30:22 -07:00 • committed by Marge Bot
parent 3800f465f5
commit f14cc46c3a
3 changed files with 8 additions and 4 deletions
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2
src/freedreno/ir3/ir3.c
View file

@ -202,6 +202,8 @@ ir3_should_double_threadsize(struct ir3_shader_variant *v, unsigned regs_count)
return false;
if (v->shader_options.real_wavesize == IR3_DOUBLE_ONLY)
return true;
if (ir3_shader_debug & IR3_DBG_THREAD64)
return false;
/* We can't support more than compiler->max_branchstack diverging threads
* in a wave. Thus, doubling the threadsize is only possible if we don't

1
src/freedreno/ir3/ir3_compiler.c
View file

@ -39,6 +39,7 @@ static const struct debug_named_value shader_debug_options[] = {
{"noaliastex", IR3_DBG_NOALIASTEX, "Don't use alias.tex"},
{"noaliasrt", IR3_DBG_NOALIASRT, "Don't use alias.rt"},
{"asmroundtrip", IR3_DBG_ASM_ROUNDTRIP, "Disassemble, reassemble and compare every shader"},
{"thread64", IR3_DBG_THREAD64, "Prefer 64-thread wave size (when available)"},
#if MESA_DEBUG
/* MESA_DEBUG-only options: */
{"schedmsgs", IR3_DBG_SCHEDMSGS, "Enable scheduler debug messages"},

9
src/freedreno/ir3/ir3_compiler.h
View file

@ -314,12 +314,13 @@ enum ir3_shader_debug {
IR3_DBG_NODESCPREFETCH = BITFIELD_BIT(18),
IR3_DBG_EXPANDRPT = BITFIELD_BIT(19),
IR3_DBG_ASM_ROUNDTRIP = BITFIELD_BIT(20),
IR3_DBG_THREAD64 = BITFIELD_BIT(21),
/* MESA_DEBUG-only options: */
IR3_DBG_SCHEDMSGS = BITFIELD_BIT(21),
IR3_DBG_RAMSGS = BITFIELD_BIT(22),
IR3_DBG_NOALIASTEX = BITFIELD_BIT(23),
IR3_DBG_NOALIASRT = BITFIELD_BIT(24),
IR3_DBG_SCHEDMSGS = BITFIELD_BIT(22),
IR3_DBG_RAMSGS = BITFIELD_BIT(23),
IR3_DBG_NOALIASTEX = BITFIELD_BIT(24),
IR3_DBG_NOALIASRT = BITFIELD_BIT(25),
};
extern enum ir3_shader_debug ir3_shader_debug;