diff --git a/src/freedreno/ir3/ir3.c b/src/freedreno/ir3/ir3.c
index 7dc042c9a55..521ce04f09f 100644
--- a/src/freedreno/ir3/ir3.c
+++ b/src/freedreno/ir3/ir3.c
@@ -202,6 +202,8 @@ ir3_should_double_threadsize(struct ir3_shader_variant *v, unsigned regs_count)
       return false;
    if (v->shader_options.real_wavesize == IR3_DOUBLE_ONLY)
       return true;
+   if (ir3_shader_debug & IR3_DBG_THREAD64)
+      return false;
 
    /* We can't support more than compiler->max_branchstack diverging threads
     * in a wave. Thus, doubling the threadsize is only possible if we don't
diff --git a/src/freedreno/ir3/ir3_compiler.c b/src/freedreno/ir3/ir3_compiler.c
index 61e40c95e56..df7f68d8f3b 100644
--- a/src/freedreno/ir3/ir3_compiler.c
+++ b/src/freedreno/ir3/ir3_compiler.c
@@ -39,6 +39,7 @@ static const struct debug_named_value shader_debug_options[] = {
    {"noaliastex", IR3_DBG_NOALIASTEX, "Don't use alias.tex"},
    {"noaliasrt",  IR3_DBG_NOALIASRT,  "Don't use alias.rt"},
    {"asmroundtrip", IR3_DBG_ASM_ROUNDTRIP, "Disassemble, reassemble and compare every shader"},
+   {"thread64",   IR3_DBG_THREAD64,   "Prefer 64-thread wave size (when available)"},
 #if MESA_DEBUG
    /* MESA_DEBUG-only options: */
    {"schedmsgs",  IR3_DBG_SCHEDMSGS,  "Enable scheduler debug messages"},
diff --git a/src/freedreno/ir3/ir3_compiler.h b/src/freedreno/ir3/ir3_compiler.h
index a95e0a3a977..2a581a26a50 100644
--- a/src/freedreno/ir3/ir3_compiler.h
+++ b/src/freedreno/ir3/ir3_compiler.h
@@ -314,12 +314,13 @@ enum ir3_shader_debug {
    IR3_DBG_NODESCPREFETCH = BITFIELD_BIT(18),
    IR3_DBG_EXPANDRPT = BITFIELD_BIT(19),
    IR3_DBG_ASM_ROUNDTRIP = BITFIELD_BIT(20),
+   IR3_DBG_THREAD64 = BITFIELD_BIT(21),
 
    /* MESA_DEBUG-only options: */
-   IR3_DBG_SCHEDMSGS = BITFIELD_BIT(21),
-   IR3_DBG_RAMSGS = BITFIELD_BIT(22),
-   IR3_DBG_NOALIASTEX = BITFIELD_BIT(23),
-   IR3_DBG_NOALIASRT = BITFIELD_BIT(24),
+   IR3_DBG_SCHEDMSGS = BITFIELD_BIT(22),
+   IR3_DBG_RAMSGS = BITFIELD_BIT(23),
+   IR3_DBG_NOALIASTEX = BITFIELD_BIT(24),
+   IR3_DBG_NOALIASRT = BITFIELD_BIT(25),
 };
 
 extern enum ir3_shader_debug ir3_shader_debug;