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brw/const: Remove TODO that isn't allowed by the hardware

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There are a lot of restrictions for bfloat16. The one that prevents this
very useful optimization from being possible is, "Broadcast of bfloat16
scalar is not supported."

Part of the reason this MR exists is to build up to implementing BF
support, and there are a couple more commits that implement
this. However, it fails on both real hardware and simulation:

    Instruction is: mad (8|M0) r6.0<1>:f 0xBF80:bf r2.0<8;1>:f r64.0<0>:f

    In bfloat/float mixed mode, bfloat src must be packed.

Alas.

Reviewed-by: Matt Turner <mattst88@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/32436>
This commit is contained in:
Ian Romanick 2024-11-27 11:31:15 -08:00 • committed by Marge Bot
parent 99d3755bdd
commit f0bf68dd25
1 changed files with 0 additions and 3 deletions
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3
src/intel/compiler/brw_fs_combine_constants.cpp
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@ -1059,9 +1059,6 @@ can_promote_src_as_imm(const struct intel_device_info *devinfo, fs_inst *inst,
if (!supports_src_as_imm(devinfo, inst, src_idx))
return false;
/* TODO - Fix the codepath below to use a bfloat16 immediate on XeHP,
* since HF/F mixed mode has been removed from the hardware.
*/
switch (inst->src[src_idx].type) {
case BRW_TYPE_F: {
uint16_t hf;