From f0bf68dd25c3abae0330e85b31becfd9fa33cb55 Mon Sep 17 00:00:00 2001 From: Ian Romanick Date: Wed, 27 Nov 2024 11:31:15 -0800 Subject: [PATCH] brw/const: Remove TODO that isn't allowed by the hardware There are a lot of restrictions for bfloat16. The one that prevents this very useful optimization from being possible is, "Broadcast of bfloat16 scalar is not supported." Part of the reason this MR exists is to build up to implementing BF support, and there are a couple more commits that implement this. However, it fails on both real hardware and simulation: Instruction is: mad (8|M0) r6.0<1>:f 0xBF80:bf r2.0<8;1>:f r64.0<0>:f In bfloat/float mixed mode, bfloat src must be packed. Alas. Reviewed-by: Matt Turner Part-of: --- src/intel/compiler/brw_fs_combine_constants.cpp | 3 --- 1 file changed, 3 deletions(-) diff --git a/src/intel/compiler/brw_fs_combine_constants.cpp b/src/intel/compiler/brw_fs_combine_constants.cpp index 896cf86cabd..eac2dff4a8f 100644 --- a/src/intel/compiler/brw_fs_combine_constants.cpp +++ b/src/intel/compiler/brw_fs_combine_constants.cpp @@ -1059,9 +1059,6 @@ can_promote_src_as_imm(const struct intel_device_info *devinfo, fs_inst *inst, if (!supports_src_as_imm(devinfo, inst, src_idx)) return false; - /* TODO - Fix the codepath below to use a bfloat16 immediate on XeHP, - * since HF/F mixed mode has been removed from the hardware. - */ switch (inst->src[src_idx].type) { case BRW_TYPE_F: { uint16_t hf;