From f094e69469cd35fae2fb9c8c7689aba0428b0546 Mon Sep 17 00:00:00 2001 From: Konstantin Seurer Date: Thu, 2 Mar 2023 17:21:13 +0100 Subject: [PATCH] radv/rt: Use ushr for extracting the cull mask Fixes the following tests: dEQP-VK.ray_tracing_pipeline.acceleration_structures.ray_cull_mask.gpu_built.ahit.4_bits dEQP-VK.ray_tracing_pipeline.acceleration_structures.ray_cull_mask.gpu_built.ahit.16_bits dEQP-VK.ray_tracing_pipeline.acceleration_structures.ray_cull_mask.gpu_built.chit.4_bits dEQP-VK.ray_tracing_pipeline.acceleration_structures.ray_cull_mask.gpu_built.chit.16_bits dEQP-VK.ray_tracing_pipeline.acceleration_structures.ray_cull_mask.gpu_built.isec.4_bits dEQP-VK.ray_tracing_pipeline.acceleration_structures.ray_cull_mask.gpu_built.isec.16_bits Fixes: 2d93ab7 ("radv/rt: Pre shift cull_mask") Part-of: --- src/amd/vulkan/radv_rt_shader.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/src/amd/vulkan/radv_rt_shader.c b/src/amd/vulkan/radv_rt_shader.c index 9e9f37e0d19..9b3898f5a93 100644 --- a/src/amd/vulkan/radv_rt_shader.c +++ b/src/amd/vulkan/radv_rt_shader.c @@ -537,7 +537,7 @@ lower_rt_instructions(nir_shader *shader, struct rt_variables *vars, unsigned ca } case nir_intrinsic_load_cull_mask: { ret = - nir_ishr_imm(&b_shader, nir_load_var(&b_shader, vars->cull_mask_and_flags), 24); + nir_ushr_imm(&b_shader, nir_load_var(&b_shader, vars->cull_mask_and_flags), 24); break; } case nir_intrinsic_ignore_ray_intersection: {