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pan: Lift pan_get_model into its own lib

Browse source 
The following commit needs to use it from panfrost/compiler. But compiler
depends itself on panfrost/lib.

Reviewed-by: Eric R. Smith <eric.smith@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/37231>
This commit is contained in:
Christoph Pillmayer 2025-09-05 14:24:03 +00:00 • committed by Marge Bot
parent 411a61cd88
commit f091bdf392
9 changed files with 298 additions and 209 deletions
Show stats Download patch file Download diff file Expand all files Collapse all files

2
src/panfrost/compiler/meson.build
View file

@ -144,7 +144,7 @@ libpanfrost_bifrost = static_library(
'panfrost_bifrost',
[libpanfrost_bifrost_files, bi_opcodes_c, bi_swizzles_c, bi_printer_c, bi_packer_c, bifrost_nir_algebraic_c, valhall_c ],
include_directories : [inc_include, inc_src, inc_valhall],
dependencies: [idep_nir, idep_bi_opcodes_h, idep_bi_builder_h, idep_valhall_enums_h],
dependencies: [idep_nir, idep_bi_opcodes_h, idep_bi_builder_h, idep_valhall_enums_h, libpanfrost_model_dep],
link_with: [libpanfrost_util, libpanfrost_bifrost_disasm, libpanfrost_valhall_disasm],
c_args : [no_override_init_args],
gnu_symbol_visibility : 'hidden',

2
src/panfrost/lib/kmod/meson.build
View file

@ -13,7 +13,7 @@ libpankmod_lib = static_library(
include_directories : [inc_include, inc_src, inc_panfrost],
c_args : [no_override_init_args],
gnu_symbol_visibility : 'hidden',
dependencies: [dep_libdrm, idep_mesautil, idep_pan_packers],
dependencies: [dep_libdrm, idep_mesautil, idep_pan_packers, libpanfrost_model_dep],
build_by_default : false,
)

4
src/panfrost/lib/meson.build
View file

@ -7,7 +7,7 @@ subdir('kmod')
pixel_format_versions = ['5', '6', '7', '9', '10', '12', '13']
libpanfrost_pixel_format = []
deps_for_libpanfrost = [dep_libdrm, idep_pan_packers, idep_mesautil]
deps_for_libpanfrost = [dep_libdrm, idep_pan_packers, idep_mesautil, libpanfrost_model_dep]
foreach ver : pixel_format_versions
libpanfrost_pixel_format += static_library(
@ -60,7 +60,7 @@ libpanfrost_lib = static_library(
include_directories : [inc_include, inc_src, inc_panfrost],
c_args : [no_override_init_args],
gnu_symbol_visibility : 'hidden',
dependencies: [dep_libdrm, idep_nir, idep_mesautil],
dependencies: [dep_libdrm, idep_nir, idep_mesautil, libpanfrost_model_dep],
build_by_default : false,
link_with: [libpanfrost_pixel_format, libpanfrost_per_arch, libpankmod_lib],
)

135
src/panfrost/lib/pan_props.c
View file

@ -32,141 +32,6 @@
#include <genxml/gen_macros.h>
/* GPU revision (rXpY) */
#define GPU_REV(X, Y) (((X) & 0xf) << 12 | ((Y) & 0xff) << 4)
/* Fixed "minimum revisions" */
#define GPU_REV_NONE (~0)
#define GPU_REV_ALL GPU_REV(0, 0)
#define GPU_REV_R0P3 GPU_REV(0, 3)
#define GPU_REV_R1P1 GPU_REV(1, 1)
#define MODEL(gpu_prod_id_, gpu_prod_id_mask_, gpu_variant_, shortname, \
counters, ...) \
{ \
.gpu_prod_id = gpu_prod_id_, \
.gpu_prod_id_mask = gpu_prod_id_mask_, \
.gpu_variant = gpu_variant_, \
.name = "Mali-" shortname, \
.performance_counters = counters, \
##__VA_ARGS__, \
}
#define MIDGARD_MODEL(gpu_prod_id, shortname, counters, ...) \
MODEL(gpu_prod_id << 16, 0xffff0000, 0, shortname, counters, ##__VA_ARGS__)
#define BIFROST_MODEL(gpu_prod_id, shortname, counters, ...) \
MODEL(gpu_prod_id << 16, ARCH_MAJOR | ARCH_MINOR | PRODUCT_MAJOR, 0, \
shortname, counters, ##__VA_ARGS__)
#define VALHALL_MODEL(gpu_prod_id, gpu_variant, shortname, counters, ...) \
MODEL(gpu_prod_id << 16, ARCH_MAJOR | ARCH_MINOR | PRODUCT_MAJOR, \
gpu_variant, shortname, counters, ##__VA_ARGS__)
#define AVALON_MODEL(gpu_prod_id, gpu_variant, shortname, counters, ...) \
MODEL(gpu_prod_id << 16, ARCH_MAJOR | ARCH_MINOR | PRODUCT_MAJOR, \
gpu_variant, shortname, counters, ##__VA_ARGS__)
#define MODEL_ANISO(rev) .min_rev_anisotropic = GPU_REV_##rev
#define MODEL_TB_SIZES(color_tb_size, z_tb_size) \
.tilebuffer = { \
.color_size = color_tb_size, \
.z_size = z_tb_size, \
}
#define MODEL_RATES(pixel_rate, texel_rate, fma_rate) \
.rates = { \
.pixel = pixel_rate, \
.texel = texel_rate, \
.fma = fma_rate, \
}
#define MODEL_QUIRKS(...) .quirks = {__VA_ARGS__}
/* Table of supported Mali GPUs */
/* clang-format off */
const struct pan_model pan_model_list[] = {
MIDGARD_MODEL(0x600, "T600", "T60x", MODEL_ANISO(NONE), MODEL_TB_SIZES( 4096, 4096),
MODEL_QUIRKS( .max_4x_msaa = true )),
MIDGARD_MODEL(0x620, "T620", "T62x", MODEL_ANISO(NONE), MODEL_TB_SIZES( 4096, 4096)),
MIDGARD_MODEL(0x720, "T720", "T72x", MODEL_ANISO(NONE), MODEL_TB_SIZES( 4096, 4096),
MODEL_QUIRKS( .no_hierarchical_tiling = true, .max_4x_msaa = true )),
MIDGARD_MODEL(0x750, "T760", "T76x", MODEL_ANISO(NONE), MODEL_TB_SIZES( 8192, 8192)),
MIDGARD_MODEL(0x820, "T820", "T82x", MODEL_ANISO(NONE), MODEL_TB_SIZES( 8192, 8192),
MODEL_QUIRKS( .no_hierarchical_tiling = true, .max_4x_msaa = true )),
MIDGARD_MODEL(0x830, "T830", "T83x", MODEL_ANISO(NONE), MODEL_TB_SIZES( 8192, 8192),
MODEL_QUIRKS( .no_hierarchical_tiling = true, .max_4x_msaa = true )),
MIDGARD_MODEL(0x860, "T860", "T86x", MODEL_ANISO(NONE), MODEL_TB_SIZES( 8192, 8192)),
MIDGARD_MODEL(0x880, "T880", "T88x", MODEL_ANISO(NONE), MODEL_TB_SIZES( 8192, 8192)),
BIFROST_MODEL(0x6000, "G71", "TMIx", MODEL_ANISO(NONE), MODEL_TB_SIZES( 4096, 4096)),
BIFROST_MODEL(0x6201, "G72", "THEx", MODEL_ANISO(R0P3), MODEL_TB_SIZES( 8192, 4096)),
BIFROST_MODEL(0x7000, "G51", "TSIx", MODEL_ANISO(R1P1), MODEL_TB_SIZES( 8192, 8192)),
BIFROST_MODEL(0x7003, "G31", "TDVx", MODEL_ANISO(ALL), MODEL_TB_SIZES( 8192, 8192)),
BIFROST_MODEL(0x7201, "G76", "TNOx", MODEL_ANISO(ALL), MODEL_TB_SIZES(16384, 8192)),
BIFROST_MODEL(0x7202, "G52", "TGOx", MODEL_ANISO(ALL), MODEL_TB_SIZES(16384, 8192)),
BIFROST_MODEL(0x7402, "G52 r1", "TGOx", MODEL_ANISO(ALL), MODEL_TB_SIZES( 8192, 8192)),
VALHALL_MODEL(0x9001, 0, "G57", "TNAx", MODEL_ANISO(ALL), MODEL_TB_SIZES(16384, 8192),
MODEL_RATES(2, 4, 32)),
VALHALL_MODEL(0x9003, 0, "G57", "TNAx", MODEL_ANISO(ALL), MODEL_TB_SIZES(16384, 8192),
MODEL_RATES(2, 4, 32)),
VALHALL_MODEL(0xa807, 0, "G610", "TVIx", MODEL_ANISO(ALL), MODEL_TB_SIZES(32768, 16384),
MODEL_RATES(4, 8, 64)),
VALHALL_MODEL(0xac04, 0, "G310", "TVAx", MODEL_ANISO(ALL), MODEL_TB_SIZES(16384, 8192),
MODEL_RATES(2, 2, 16)),
VALHALL_MODEL(0xac04, 1, "G310", "TVAx", MODEL_ANISO(ALL), MODEL_TB_SIZES(16384, 8192),
MODEL_RATES(2, 4, 32)),
VALHALL_MODEL(0xac04, 2, "G310", "TVAx", MODEL_ANISO(ALL), MODEL_TB_SIZES(16384, 8192),
MODEL_RATES(4, 4, 48)),
VALHALL_MODEL(0xac04, 3, "G310", "TVAx", MODEL_ANISO(ALL), MODEL_TB_SIZES(32768, 16384),
MODEL_RATES(4, 8, 48)),
VALHALL_MODEL(0xac04, 4, "G310", "TVAx", MODEL_ANISO(ALL), MODEL_TB_SIZES(32768, 16384),
MODEL_RATES(4, 8, 64)),
AVALON_MODEL( 0xc800, 4, "G720", "TTIx", MODEL_ANISO(ALL), MODEL_TB_SIZES(65536, 32768),
MODEL_RATES(4, 8, 128)),
AVALON_MODEL( 0xd800, 4, "G725", "TKRx", MODEL_ANISO(ALL), MODEL_TB_SIZES(65536, 65536),
MODEL_RATES(4, 8, 128)),
};
/* clang-format on */
#undef GPU_REV
#undef GPU_REV_NONE
#undef GPU_REV_ALL
#undef GPU_REV_R0P3
#undef GPU_REV_R1P1
#undef MIDGARD_MODEL
#undef BIFROST_MODEL
#undef VALHALL_MODEL
#undef AVALON_MODEL
#undef MODEL
#undef MODEL_ANISO
#undef MODEL_TB_SIZES
#undef MODEL_RATES
#undef MODEL_QUIRKS
/*
* Look up a supported model by its GPU ID, or return NULL if the model is not
* supported at this time.
*/
const struct pan_model *
pan_get_model(uint32_t gpu_id, uint32_t gpu_variant)
{
for (unsigned i = 0; i < ARRAY_SIZE(pan_model_list); ++i) {
uint32_t gpu_prod_id = gpu_id & pan_model_list[i].gpu_prod_id_mask;
if (pan_model_list[i].gpu_prod_id == gpu_prod_id &&
pan_model_list[i].gpu_variant == gpu_variant)
return &pan_model_list[i];
}
return NULL;
}
unsigned
pan_query_l2_slices(const struct pan_kmod_dev_props *props)
{

71
src/panfrost/lib/pan_props.h
View file

@ -32,79 +32,12 @@
#include "util/macros.h"
#include "pan_model.h"
struct pan_kmod_dev;
struct pan_kmod_dev_props;
struct pan_kmod_vm;
/** Implementation-defined tiler features */
struct pan_tiler_features {
/** Number of bytes per tiler bin */
unsigned bin_size;
/** Maximum number of levels that may be simultaneously enabled.
* Invariant: bitcount(hierarchy_mask) <= max_levels */
unsigned max_levels;
};
#define ARCH_MAJOR BITFIELD_RANGE(28, 4)
#define ARCH_MINOR BITFIELD_RANGE(24, 4)
#define ARCH_REV BITFIELD_RANGE(20, 4)
#define PRODUCT_MAJOR BITFIELD_RANGE(16, 4)
#define VERSION_MAJOR BITFIELD_RANGE(12, 4)
#define VERSION_MINOR BITFIELD_RANGE(4, 8)
#define VERSION_STATUS BITFIELD_RANGE(0, 4)
struct pan_model {
/* GPU product ID */
uint32_t gpu_prod_id;
/* Mask to apply to the GPU ID to get a product ID. */
uint32_t gpu_prod_id_mask;
/* GPU variant. */
uint32_t gpu_variant;
/* Marketing name for the GPU, used as the GL_RENDERER */
const char *name;
/* Set of associated performance counters */
const char *performance_counters;
/* Minimum GPU revision required for anisotropic filtering. ~0 and 0
* means "no revisions support anisotropy" and "all revisions support
* anistropy" respectively -- so checking for anisotropy is simply
* comparing the reivsion.
*/
uint32_t min_rev_anisotropic;
struct {
/* Default tilebuffer size in bytes for the model. */
uint32_t color_size;
/* Default tilebuffer depth size in bytes for the model. */
uint32_t z_size;
} tilebuffer;
/* Maximum number of pixels, texels, and FMA ops, per clock per shader
* core, or 0 if it can't be determined for the given GPU. */
struct {
uint32_t pixel;
uint32_t texel;
uint32_t fma;
} rates;
struct {
/* The GPU lacks the capability for hierarchical tiling, without
* an "Advanced Tiling Unit", instead requiring a single bin
* size for the entire framebuffer be selected by the driver
*/
bool no_hierarchical_tiling;
bool max_4x_msaa;
} quirks;
};
const struct pan_model *pan_get_model(uint32_t gpu_id, uint32_t gpu_variant);
unsigned pan_query_l2_slices(const struct pan_kmod_dev_props *props);
struct pan_tiler_features

3
src/panfrost/meson.build
View file

@ -3,7 +3,7 @@
# SPDX-License-Identifier: MIT
inc_panfrost = include_directories([
'.', 'shared', 'midgard', 'compiler', 'lib', 'libpan',
'.', 'shared', 'midgard', 'compiler', 'lib', 'libpan', 'model',
])
compile_args_panfrost = [
@ -13,6 +13,7 @@ compile_args_panfrost = [
subdir('shared')
subdir('util')
subdir('midgard')
subdir('model')
subdir('compiler')
if with_gallium_panfrost or with_panfrost_vk or with_tools.contains('panfrost')

24
src/panfrost/model/meson.build Normal file
View file

@ -0,0 +1,24 @@
# Copyright © 2018 Rob Clark
# Copyright © 2019 Collabora
# Copyright © 2025 Arm Ltd.
# SPDX-License-Identifier: MIT
libpanfrost_model_files = files(
'pan_model.h',
'pan_model.c',
)
libpanfrost_model_lib = static_library(
'panfrost_model_lib',
[libpanfrost_model_files],
include_directories : [inc_src],
c_args : [no_override_init_args],
gnu_symbol_visibility : 'hidden',
build_by_default : false,
)
libpanfrost_model_dep = declare_dependency(
link_with: [libpanfrost_model_lib],
include_directories: [inc_include, inc_src, inc_panfrost],
)

162
src/panfrost/model/pan_model.c Normal file
View file

@ -0,0 +1,162 @@
/*
* Copyright (C) 2019 Collabora, Ltd.
*
* Permission is hereby granted, free of charge, to any person obtaining a
* copy of this software and associated documentation files (the "Software"),
* to deal in the Software without restriction, including without limitation
* the rights to use, copy, modify, merge, publish, distribute, sublicense,
* and/or sell copies of the Software, and to permit persons to whom the
* Software is furnished to do so, subject to the following conditions:
*
* The above copyright notice and this permission notice (including the next
* paragraph) shall be included in all copies or substantial portions of the
* Software.
*
* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
* THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
* LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
* OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
* SOFTWARE.
*
* Authors:
* Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
*/
#include "pan_model.h"
/* GPU revision (rXpY) */
#define GPU_REV(X, Y) (((X) & 0xf) << 12 | ((Y) & 0xff) << 4)
/* Fixed "minimum revisions" */
#define GPU_REV_NONE (~0)
#define GPU_REV_ALL GPU_REV(0, 0)
#define GPU_REV_R0P3 GPU_REV(0, 3)
#define GPU_REV_R1P1 GPU_REV(1, 1)
#define MODEL(gpu_prod_id_, gpu_prod_id_mask_, gpu_variant_, shortname, \
counters, ...) \
{ \
.gpu_prod_id = gpu_prod_id_, \
.gpu_prod_id_mask = gpu_prod_id_mask_, \
.gpu_variant = gpu_variant_, \
.name = "Mali-" shortname, \
.performance_counters = counters, \
##__VA_ARGS__, \
}
#define MIDGARD_MODEL(gpu_prod_id, shortname, counters, ...) \
MODEL(gpu_prod_id << 16, 0xffff0000, 0, shortname, counters, ##__VA_ARGS__)
#define BIFROST_MODEL(gpu_prod_id, shortname, counters, ...) \
MODEL(gpu_prod_id << 16, ARCH_MAJOR | ARCH_MINOR | PRODUCT_MAJOR, 0, \
shortname, counters, ##__VA_ARGS__)
#define VALHALL_MODEL(gpu_prod_id, gpu_variant, shortname, counters, ...) \
MODEL(gpu_prod_id << 16, ARCH_MAJOR | ARCH_MINOR | PRODUCT_MAJOR, \
gpu_variant, shortname, counters, ##__VA_ARGS__)
#define AVALON_MODEL(gpu_prod_id, gpu_variant, shortname, counters, ...) \
MODEL(gpu_prod_id << 16, ARCH_MAJOR | ARCH_MINOR | PRODUCT_MAJOR, \
gpu_variant, shortname, counters, ##__VA_ARGS__)
#define MODEL_ANISO(rev) .min_rev_anisotropic = GPU_REV_##rev
#define MODEL_TB_SIZES(color_tb_size, z_tb_size) \
.tilebuffer = { \
.color_size = color_tb_size, \
.z_size = z_tb_size, \
}
#define MODEL_RATES(pixel_rate, texel_rate, fma_rate) \
.rates = { \
.pixel = pixel_rate, \
.texel = texel_rate, \
.fma = fma_rate, \
}
#define MODEL_QUIRKS(...) .quirks = {__VA_ARGS__}
/* Table of supported Mali GPUs */
/* clang-format off */
const struct pan_model pan_model_list[] = {
MIDGARD_MODEL(0x600, "T600", "T60x", MODEL_ANISO(NONE), MODEL_TB_SIZES( 4096, 4096),
MODEL_QUIRKS( .max_4x_msaa = true )),
MIDGARD_MODEL(0x620, "T620", "T62x", MODEL_ANISO(NONE), MODEL_TB_SIZES( 4096, 4096)),
MIDGARD_MODEL(0x720, "T720", "T72x", MODEL_ANISO(NONE), MODEL_TB_SIZES( 4096, 4096),
MODEL_QUIRKS( .no_hierarchical_tiling = true, .max_4x_msaa = true )),
MIDGARD_MODEL(0x750, "T760", "T76x", MODEL_ANISO(NONE), MODEL_TB_SIZES( 8192, 8192)),
MIDGARD_MODEL(0x820, "T820", "T82x", MODEL_ANISO(NONE), MODEL_TB_SIZES( 8192, 8192),
MODEL_QUIRKS( .no_hierarchical_tiling = true, .max_4x_msaa = true )),
MIDGARD_MODEL(0x830, "T830", "T83x", MODEL_ANISO(NONE), MODEL_TB_SIZES( 8192, 8192),
MODEL_QUIRKS( .no_hierarchical_tiling = true, .max_4x_msaa = true )),
MIDGARD_MODEL(0x860, "T860", "T86x", MODEL_ANISO(NONE), MODEL_TB_SIZES( 8192, 8192)),
MIDGARD_MODEL(0x880, "T880", "T88x", MODEL_ANISO(NONE), MODEL_TB_SIZES( 8192, 8192)),
BIFROST_MODEL(0x6000, "G71", "TMIx", MODEL_ANISO(NONE), MODEL_TB_SIZES( 4096, 4096)),
BIFROST_MODEL(0x6201, "G72", "THEx", MODEL_ANISO(R0P3), MODEL_TB_SIZES( 8192, 4096)),
BIFROST_MODEL(0x7000, "G51", "TSIx", MODEL_ANISO(R1P1), MODEL_TB_SIZES( 8192, 8192)),
BIFROST_MODEL(0x7003, "G31", "TDVx", MODEL_ANISO(ALL), MODEL_TB_SIZES( 8192, 8192)),
BIFROST_MODEL(0x7201, "G76", "TNOx", MODEL_ANISO(ALL), MODEL_TB_SIZES(16384, 8192)),
BIFROST_MODEL(0x7202, "G52", "TGOx", MODEL_ANISO(ALL), MODEL_TB_SIZES(16384, 8192)),
BIFROST_MODEL(0x7402, "G52 r1", "TGOx", MODEL_ANISO(ALL), MODEL_TB_SIZES( 8192, 8192)),
VALHALL_MODEL(0x9001, 0, "G57", "TNAx", MODEL_ANISO(ALL), MODEL_TB_SIZES(16384, 8192),
MODEL_RATES(2, 4, 32)),
VALHALL_MODEL(0x9003, 0, "G57", "TNAx", MODEL_ANISO(ALL), MODEL_TB_SIZES(16384, 8192),
MODEL_RATES(2, 4, 32)),
VALHALL_MODEL(0xa807, 0, "G610", "TVIx", MODEL_ANISO(ALL), MODEL_TB_SIZES(32768, 16384),
MODEL_RATES(4, 8, 64)),
VALHALL_MODEL(0xac04, 0, "G310", "TVAx", MODEL_ANISO(ALL), MODEL_TB_SIZES(16384, 8192),
MODEL_RATES(2, 2, 16)),
VALHALL_MODEL(0xac04, 1, "G310", "TVAx", MODEL_ANISO(ALL), MODEL_TB_SIZES(16384, 8192),
MODEL_RATES(2, 4, 32)),
VALHALL_MODEL(0xac04, 2, "G310", "TVAx", MODEL_ANISO(ALL), MODEL_TB_SIZES(16384, 8192),
MODEL_RATES(4, 4, 48)),
VALHALL_MODEL(0xac04, 3, "G310", "TVAx", MODEL_ANISO(ALL), MODEL_TB_SIZES(32768, 16384),
MODEL_RATES(4, 8, 48)),
VALHALL_MODEL(0xac04, 4, "G310", "TVAx", MODEL_ANISO(ALL), MODEL_TB_SIZES(32768, 16384),
MODEL_RATES(4, 8, 64)),
AVALON_MODEL( 0xc800, 4, "G720", "TTIx", MODEL_ANISO(ALL), MODEL_TB_SIZES(65536, 32768),
MODEL_RATES(4, 8, 128)),
AVALON_MODEL( 0xd800, 4, "G725", "TKRx", MODEL_ANISO(ALL), MODEL_TB_SIZES(65536, 65536),
MODEL_RATES(4, 8, 128)),
};
/* clang-format on */
#undef GPU_REV
#undef GPU_REV_NONE
#undef GPU_REV_ALL
#undef GPU_REV_R0P3
#undef GPU_REV_R1P1
#undef MIDGARD_MODEL
#undef BIFROST_MODEL
#undef VALHALL_MODEL
#undef AVALON_MODEL
#undef MODEL
#undef MODEL_ANISO
#undef MODEL_TB_SIZES
#undef MODEL_RATES
#undef MODEL_QUIRKS
/*
* Look up a supported model by its GPU ID, or return NULL if the model is not
* supported at this time.
*/
const struct pan_model *
pan_get_model(uint32_t gpu_id, uint32_t gpu_variant)
{
for (unsigned i = 0; i < ARRAY_SIZE(pan_model_list); ++i) {
uint32_t gpu_prod_id = gpu_id & pan_model_list[i].gpu_prod_id_mask;
if (pan_model_list[i].gpu_prod_id == gpu_prod_id &&
pan_model_list[i].gpu_variant == gpu_variant)
return &pan_model_list[i];
}
return NULL;
}

104
src/panfrost/model/pan_model.h Normal file
View file

@ -0,0 +1,104 @@
/*
* Copyright (C) 2019 Collabora, Ltd.
*
* Permission is hereby granted, free of charge, to any person obtaining a
* copy of this software and associated documentation files (the "Software"),
* to deal in the Software without restriction, including without limitation
* the rights to use, copy, modify, merge, publish, distribute, sublicense,
* and/or sell copies of the Software, and to permit persons to whom the
* Software is furnished to do so, subject to the following conditions:
*
* The above copyright notice and this permission notice (including the next
* paragraph) shall be included in all copies or substantial portions of the
* Software.
*
* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
* THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
* LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
* OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
* SOFTWARE.
*
* Authors:
* Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
*/
#ifndef PAN_MODEL_H
#define PAN_MODEL_H
#include <stdbool.h>
#include <stdint.h>
#include "util/macros.h"
/** Implementation-defined tiler features */
struct pan_tiler_features {
/** Number of bytes per tiler bin */
unsigned bin_size;
/** Maximum number of levels that may be simultaneously enabled.
* Invariant: bitcount(hierarchy_mask) <= max_levels */
unsigned max_levels;
};
#define ARCH_MAJOR BITFIELD_RANGE(28, 4)
#define ARCH_MINOR BITFIELD_RANGE(24, 4)
#define ARCH_REV BITFIELD_RANGE(20, 4)
#define PRODUCT_MAJOR BITFIELD_RANGE(16, 4)
#define VERSION_MAJOR BITFIELD_RANGE(12, 4)
#define VERSION_MINOR BITFIELD_RANGE(4, 8)
#define VERSION_STATUS BITFIELD_RANGE(0, 4)
struct pan_model {
/* GPU product ID */
uint32_t gpu_prod_id;
/* Mask to apply to the GPU ID to get a product ID. */
uint32_t gpu_prod_id_mask;
/* GPU variant. */
uint32_t gpu_variant;
/* Marketing name for the GPU, used as the GL_RENDERER */
const char *name;
/* Set of associated performance counters */
const char *performance_counters;
/* Minimum GPU revision required for anisotropic filtering. ~0 and 0
* means "no revisions support anisotropy" and "all revisions support
* anistropy" respectively -- so checking for anisotropy is simply
* comparing the reivsion.
*/
uint32_t min_rev_anisotropic;
struct {
/* Default tilebuffer size in bytes for the model. */
uint32_t color_size;
/* Default tilebuffer depth size in bytes for the model. */
uint32_t z_size;
} tilebuffer;
/* Maximum number of pixels, texels, and FMA ops, per clock per shader
* core, or 0 if it can't be determined for the given GPU. */
struct {
uint32_t pixel;
uint32_t texel;
uint32_t fma;
} rates;
struct {
/* The GPU lacks the capability for hierarchical tiling, without
* an "Advanced Tiling Unit", instead requiring a single bin
* size for the entire framebuffer be selected by the driver
*/
bool no_hierarchical_tiling;
bool max_4x_msaa;
} quirks;
};
const struct pan_model *pan_get_model(uint32_t gpu_id, uint32_t gpu_variant);
#endif