aco: adjust some gfx_level checks for gfx11.7

Signed-off-by: Rhys Perry <pendingchaos02@gmail.com>
Reviewed-by: Georg Lehmann <dadschoorse@gmail.com>
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/40917>
This commit is contained in:
Rhys Perry 2026-04-09 13:40:01 +01:00 committed by Marge Bot
parent 58debf726c
commit efb863173e
2 changed files with 5 additions and 5 deletions

View file

@ -274,11 +274,11 @@ emit_smem_instruction(asm_context& ctx, std::vector<uint32_t>& out, const Instru
/* We don't use the NV bit. */
} else {
encoding = (0b111101 << 26);
if (ctx.gfx_level <= GFX11_5)
if (ctx.gfx_level < GFX12)
encoding |= dlc ? 1 << (ctx.gfx_level >= GFX11 ? 13 : 14) : 0;
}
if (ctx.gfx_level <= GFX11_5) {
if (ctx.gfx_level < GFX12) {
encoding |= opcode << 18;
encoding |= glc ? 1 << (ctx.gfx_level >= GFX11 ? 14 : 16) : 0;
} else {

View file

@ -1970,7 +1970,7 @@ visit_image_store(isel_context* ctx, nir_intrinsic_instr* instr)
nir_scalar comp = nir_scalar_resolved(instr->src[3].ssa, i);
if (nir_scalar_is_undef(comp)) {
dmask &= ~BITFIELD_BIT(i);
} else if (ctx->options->gfx_level <= GFX11_5) {
} else if (ctx->options->gfx_level < GFX12) {
if (nir_scalar_is_const(comp) && nir_scalar_as_uint(comp) == 0)
dmask &= ~BITFIELD_BIT(i);
} else {
@ -4262,9 +4262,9 @@ visit_intrinsic(isel_context* ctx, nir_intrinsic_instr* instr)
Temp tid = emit_mbcnt(ctx, bld.tmp(v1));
Temp src_lane = bld.vadd32(bld.def(v1), tid, delta);
if (ctx->program->gfx_level >= GFX10 && ctx->program->gfx_level <= GFX11_5 &&
if (ctx->program->gfx_level >= GFX10 && ctx->program->gfx_level < GFX12 &&
cluster_size == 32) {
/* ds_bpermute is restricted to 32 lanes on GFX10-GFX11.5. */
/* ds_bpermute is restricted to 32 lanes on GFX10-GFX11.7. */
Temp index_x4 =
bld.vop2(aco_opcode::v_lshlrev_b32, bld.def(v1), Operand::c32(2u), src_lane);
tmp = bld.ds(aco_opcode::ds_bpermute_b32, bld.def(v1), index_x4, src);