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aco: adjust some gfx_level checks for gfx11.7
Signed-off-by: Rhys Perry <pendingchaos02@gmail.com> Reviewed-by: Georg Lehmann <dadschoorse@gmail.com> Reviewed-by: Marek Olšák <marek.olsak@amd.com> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/40917>
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2 changed files with 5 additions and 5 deletions
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@ -274,11 +274,11 @@ emit_smem_instruction(asm_context& ctx, std::vector<uint32_t>& out, const Instru
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/* We don't use the NV bit. */
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} else {
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encoding = (0b111101 << 26);
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if (ctx.gfx_level <= GFX11_5)
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if (ctx.gfx_level < GFX12)
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encoding |= dlc ? 1 << (ctx.gfx_level >= GFX11 ? 13 : 14) : 0;
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}
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if (ctx.gfx_level <= GFX11_5) {
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if (ctx.gfx_level < GFX12) {
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encoding |= opcode << 18;
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encoding |= glc ? 1 << (ctx.gfx_level >= GFX11 ? 14 : 16) : 0;
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} else {
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@ -1970,7 +1970,7 @@ visit_image_store(isel_context* ctx, nir_intrinsic_instr* instr)
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nir_scalar comp = nir_scalar_resolved(instr->src[3].ssa, i);
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if (nir_scalar_is_undef(comp)) {
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dmask &= ~BITFIELD_BIT(i);
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} else if (ctx->options->gfx_level <= GFX11_5) {
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} else if (ctx->options->gfx_level < GFX12) {
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if (nir_scalar_is_const(comp) && nir_scalar_as_uint(comp) == 0)
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dmask &= ~BITFIELD_BIT(i);
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} else {
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@ -4262,9 +4262,9 @@ visit_intrinsic(isel_context* ctx, nir_intrinsic_instr* instr)
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Temp tid = emit_mbcnt(ctx, bld.tmp(v1));
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Temp src_lane = bld.vadd32(bld.def(v1), tid, delta);
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if (ctx->program->gfx_level >= GFX10 && ctx->program->gfx_level <= GFX11_5 &&
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if (ctx->program->gfx_level >= GFX10 && ctx->program->gfx_level < GFX12 &&
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cluster_size == 32) {
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/* ds_bpermute is restricted to 32 lanes on GFX10-GFX11.5. */
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/* ds_bpermute is restricted to 32 lanes on GFX10-GFX11.7. */
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Temp index_x4 =
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bld.vop2(aco_opcode::v_lshlrev_b32, bld.def(v1), Operand::c32(2u), src_lane);
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tmp = bld.ds(aco_opcode::ds_bpermute_b32, bld.def(v1), index_x4, src);
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