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radeonsi: implement nir_intrinsic_load_half_line_width_amd

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Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Signed-off-by: Qiang Yu <yuq825@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/17455>
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Qiang Yu 2022-06-06 16:37:16 +08:00 • committed by Marge Bot
parent 0511713af7
commit ec9d357b33
1 changed files with 7 additions and 0 deletions
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7
src/gallium/drivers/radeonsi/si_shader_llvm.c
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@ -796,6 +796,13 @@ static LLVMValueRef si_llvm_load_intrinsic(struct ac_shader_abi *abi, nir_intrin
case nir_intrinsic_load_ring_es2gs_offset_amd:
return ac_get_arg(&ctx->ac, ctx->args.es2gs_offset);
case nir_intrinsic_load_clip_half_line_width_amd: {
LLVMValueRef ptr =
LLVMBuildPointerCast(ctx->ac.builder, ac_get_arg(&ctx->ac, ctx->small_prim_cull_info),
LLVMPointerType(ctx->ac.v2f32, AC_ADDR_SPACE_CONST_32BIT), "");
return ac_build_load_to_sgpr(&ctx->ac, ptr, LLVMConstInt(ctx->ac.i32, 4, 0));
}
default:
return NULL;
}