broadcom/compiler: really enable branch in delay slots validation

The validation of branch instructions happening in branch and thrsw
delay slots has been dead code since it was introduced as the check
was after:

  if (inst->type != V3D_QPU_INSTR_TYPE_ALU)
          return;

Now last_branch_ip is updated and checks in_branch_delay_slots()
are active.

Fixes in_branch_delay_slots, as for branch there are always 3 delay slots.

As scheduler enforces this restrictions shader-db does not show any
regression.

Assisted-by: Claude Opus 4.6
Fixes: 90269ba353 ("broadcom/vc5: Use THRSW to enable multi-threaded shaders.")
Reviewed-by: Iago Toral Quiroga <itoral@igalia.com>
(cherry picked from commit dd6e7c8ef0)

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/41269>
This commit is contained in:
Jose Maria Casanova Crespo 2026-04-10 12:55:50 +02:00 committed by Eric Engestrom
parent 1dc3d9e7ae
commit ec15373268
2 changed files with 11 additions and 11 deletions

View file

@ -6404,7 +6404,7 @@
"description": "broadcom/compiler: really enable branch in delay slots validation",
"nominated": true,
"nomination_type": 2,
"resolution": 0,
"resolution": 1,
"main_sha": null,
"because_sha": "90269ba353333be13e54549ecff3adb8803661db",
"notes": null

View file

@ -81,7 +81,7 @@ fail_instr(struct v3d_qpu_validate_state *state, const char *msg)
static bool
in_branch_delay_slots(struct v3d_qpu_validate_state *state)
{
return (state->ip - state->last_branch_ip) < 3;
return (state->ip - state->last_branch_ip) < 4;
}
static bool
@ -130,8 +130,16 @@ qpu_validate_inst(struct v3d_qpu_validate_state *state, struct qinst *qinst)
fail_instr(state, "Implicit branch MSF read after TLB Z write");
}
if (inst->type != V3D_QPU_INSTR_TYPE_ALU)
if (inst->type == V3D_QPU_INSTR_TYPE_BRANCH) {
if (in_branch_delay_slots(state))
fail_instr(state, "branch in a branch delay slot.");
if (in_thrsw_delay_slots(state))
fail_instr(state, "branch in a THRSW delay slot.");
state->last_branch_ip = state->ip;
return;
}
assert(inst->type == V3D_QPU_INSTR_TYPE_ALU);
if (inst->alu.mul.op == V3D_QPU_M_MULTOP)
state->rtop_valid = true;
@ -383,14 +391,6 @@ qpu_validate_inst(struct v3d_qpu_validate_state *state, struct qinst *qinst)
state->rtop_hazard = true;
state->rtop_valid = false;
}
if (inst->type == V3D_QPU_INSTR_TYPE_BRANCH) {
if (in_branch_delay_slots(state))
fail_instr(state, "branch in a branch delay slot.");
if (in_thrsw_delay_slots(state))
fail_instr(state, "branch in a THRSW delay slot.");
state->last_branch_ip = state->ip;
}
}
static void