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radeonsi/vce: Fix bitstream buffer size

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On old VCE this was being rejected by kernel because the size here
was the buffer size, but the bitstream buffer address includes the
offset.

Fixes: 901aafb030 ("radeonsi/vce: Support raw packed headers")
Closes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/13128
Reviewed-by: Ruijing Dong <ruijing.dong@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/34894>
(cherry picked from commit fd1480c3df)
This commit is contained in:
David Rosca 2025-05-09 11:56:34 +02:00 • committed by Eric Engestrom
parent 9ad71e37a5
commit eb020edc6b
2 changed files with 2 additions and 2 deletions
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2
.pick_status.json
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@ -4234,7 +4234,7 @@
"description": "radeonsi/vce: Fix bitstream buffer size",
"nominated": true,
"nomination_type": 2,
"resolution": 0,
"resolution": 1,
"main_sha": null,
"because_sha": "901aafb030fc6d483ddd0f1ac6b7e6f0d0beafd4",
"notes": null

2
src/gallium/drivers/radeonsi/radeon_vce_52.c
View file

@ -332,7 +332,7 @@ static void encode(struct rvce_encoder *enc)
RVCE_BEGIN(0x05000004); // video bitstream buffer
RVCE_WRITE(enc->bs_handle, RADEON_DOMAIN_GTT, enc->bs_offset); // videoBitstreamRingAddressHi/Lo
RVCE_CS(enc->bs_size); // videoBitstreamRingSize
RVCE_CS(enc->bs_size - enc->bs_offset); // videoBitstreamRingSize
RVCE_END();
if (enc->dual_pipe) {