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nvc0/ir: allow iset to produce a boolean float

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Signed-off-by: Ilia Mirkin <imirkin@alum.mit.edu>
This commit is contained in:
Ilia Mirkin 2015-05-08 23:00:05 -04:00
parent 0ec6b8ea8c
commit e5ad19a46e
3 changed files with 16 additions and 5 deletions
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12
src/gallium/drivers/nouveau/codegen/nv50_ir_emit_gk110.cpp
View file

@ -967,8 +967,8 @@ CodeEmitterGK110::emitSET(const CmpInstruction *i)
code[0] = (code[0] & ~0xfc) | ((code[0] << 3) & 0xe0);
if (i->defExists(1))
defId(i->def(1), 2);
else
code[0] |= 0x1c;
else
code[0] |= 0x1c;
} else {
switch (i->sType) {
case TYPE_F32: op2 = 0x000; op1 = 0x800; break;
@ -990,8 +990,12 @@ CodeEmitterGK110::emitSET(const CmpInstruction *i)
}
FTZ_(3a);
if (i->dType == TYPE_F32)
code[1] |= 1 << 23;
if (i->dType == TYPE_F32) {
if (isFloatType(i->sType))
code[1] |= 1 << 23;
else
code[1] |= 1 << 15;
}
}
if (i->sType == TYPE_S32)
code[1] |= 1 << 19;

1
src/gallium/drivers/nouveau/codegen/nv50_ir_emit_gm107.cpp
View file

@ -1830,6 +1830,7 @@ CodeEmitterGM107::emitISET()
emitCond3(0x31, insn->setCond);
emitField(0x30, 1, isSignedType(insn->sType));
emitCC (0x2f);
emitField(0x2c, 1, insn->dType == TYPE_F32);
emitX (0x2b);
emitGPR (0x08, insn->src(0));
emitGPR (0x00, insn->def(0));

8
src/gallium/drivers/nouveau/codegen/nv50_ir_emit_nvc0.cpp
View file

@ -1078,8 +1078,14 @@ CodeEmitterNVC0::emitSET(const CmpInstruction *i)
if (!isFloatType(i->sType))
lo = 0x3;
if (isFloatType(i->dType) || isSignedIntType(i->sType))
if (isSignedIntType(i->sType))
lo |= 0x20;
if (isFloatType(i->dType)) {
if (isFloatType(i->sType))
lo |= 0x20;
else
lo |= 0x80;
}
switch (i->op) {
case OP_SET_AND: hi = 0x10000000; break;