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nvc0/ir: avoid jumping to a sched instruction

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Signed-off-by: Ilia Mirkin <imirkin@alum.mit.edu>
This commit is contained in:
Ilia Mirkin 2015-05-03 18:38:52 -04:00
parent 491adb61d2
commit 0ec6b8ea8c
3 changed files with 9 additions and 2 deletions
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2
src/gallium/drivers/nouveau/codegen/nv50_ir_emit_gk110.cpp
View file

@ -1316,6 +1316,8 @@ CodeEmitterGK110::emitFlow(const Instruction *i)
} else
if (mask & 2) {
int32_t pcRel = f->target.bb->binPos - (codeSize + 8);
if (writeIssueDelays && !(f->target.bb->binPos & 0x3f))
pcRel += 8;
// currently we don't want absolute branches
assert(!f->absolute);
code[0] |= (pcRel & 0x1ff) << 23;

7
src/gallium/drivers/nouveau/codegen/nv50_ir_emit_gm107.cpp
View file

@ -509,10 +509,13 @@ CodeEmitterGM107::emitBRA()
emitCond5(0x00, CC_TR);
if (!insn->srcExists(0) || insn->src(0).getFile() != FILE_MEMORY_CONST) {
int32_t pos = insn->target.bb->binPos;
if (writeIssueDelays && !(pos & 0x1f))
pos += 8;
if (!insn->absolute)
emitField(0x14, 24, insn->target.bb->binPos - (codeSize + 8));
emitField(0x14, 24, pos - (codeSize + 8));
else
emitField(0x14, 32, insn->target.bb->binPos);
emitField(0x14, 32, pos);
} else {
emitCBUF (0x24, gpr, 20, 16, 0, insn->src(0));
emitField(0x05, 1, 1);

2
src/gallium/drivers/nouveau/codegen/nv50_ir_emit_nvc0.cpp
View file

@ -1406,6 +1406,8 @@ CodeEmitterNVC0::emitFlow(const Instruction *i)
} else
if (mask & 2) {
int32_t pcRel = f->target.bb->binPos - (codeSize + 8);
if (writeIssueDelays && !(f->target.bb->binPos & 0x3f))
pcRel += 8;
// currently we don't want absolute branches
assert(!f->absolute);
code[0] |= (pcRel & 0x3f) << 26;