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intel/brw: Remove Gfx8- code from fs_inst

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Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/27691>
This commit is contained in:
Caio Oliveira 2024-02-17 22:15:44 -08:00 • committed by Marge Bot
parent b6098676fa
commit 3b3931daec
2 changed files with 4 additions and 15 deletions
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13
src/intel/compiler/brw_fs.cpp
View file

@ -449,9 +449,6 @@ fs_inst::has_source_and_destination_hazard() const
bool
fs_inst::can_do_source_mods(const struct intel_device_info *devinfo) const
{
if (devinfo->ver == 6 && is_math())
return false;
if (is_send_from_grf())
return false;
@ -1023,9 +1020,9 @@ fs_inst::flags_read(const intel_device_info *devinfo) const
if (devinfo->ver < 20 && (predicate == BRW_PREDICATE_ALIGN1_ANYV ||
predicate == BRW_PREDICATE_ALIGN1_ALLV)) {
/* The vertical predication modes combine corresponding bits from
* f0.0 and f1.0 on Gfx7+, and f0.0 and f0.1 on older hardware.
* f0.0 and f1.0 on Gfx7+.
*/
const unsigned shift = devinfo->ver >= 7 ? 4 : 2;
const unsigned shift = 4;
return brw_fs_flag_mask(this, 1) << shift | brw_fs_flag_mask(this, 1);
} else if (predicate) {
return brw_fs_flag_mask(this, predicate_width(devinfo, predicate));
@ -1041,11 +1038,7 @@ fs_inst::flags_read(const intel_device_info *devinfo) const
unsigned
fs_inst::flags_written(const intel_device_info *devinfo) const
{
/* On Gfx4 and Gfx5, sel.l (for min) and sel.ge (for max) are implemented
* using a separate cmpn and sel instruction. This lowering occurs in
* fs_vistor::lower_minmax which is called very, very late.
*/
if ((conditional_mod && ((opcode != BRW_OPCODE_SEL || devinfo->ver <= 5) &&
if ((conditional_mod && (opcode != BRW_OPCODE_SEL &&
opcode != BRW_OPCODE_CSEL &&
opcode != BRW_OPCODE_IF &&
opcode != BRW_OPCODE_WHILE)) ||

6
src/intel/compiler/brw_shader.cpp
View file

@ -1029,11 +1029,7 @@ bool
backend_instruction::writes_accumulator_implicitly(const struct intel_device_info *devinfo) const
{
return writes_accumulator ||
(devinfo->ver < 6 &&
((opcode >= BRW_OPCODE_ADD && opcode < BRW_OPCODE_NOP) ||
(opcode >= FS_OPCODE_DDX_COARSE && opcode <= FS_OPCODE_LINTERP))) ||
(opcode == FS_OPCODE_LINTERP &&
(!devinfo->has_pln || devinfo->ver <= 6)) ||
(opcode == FS_OPCODE_LINTERP && !devinfo->has_pln) ||
(eot && intel_needs_workaround(devinfo, 14010017096));
}