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anv: fix internal compute shader constant data pull

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Forgot to update this path that must now use the new intrinsic.

Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Closes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/15012
Fixes: 9f2215b480 ("anv/brw: remove push constant load emulation from the backend compiler")
Tested-by: Felix DeGrood <felix.j.degrood@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/40308>
This commit is contained in:
Lionel Landwerlin 2026-03-09 20:41:34 +02:00 • committed by Marge Bot
parent f508c6acbb
commit df06d117c5
1 changed files with 15 additions and 4 deletions
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19
src/intel/vulkan/genX_internal_kernels.c
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@ -28,10 +28,21 @@
#include "genxml/gen_macros.h"
#define load_param(b, bit_size, struct_name, field_name) \
nir_load_push_data_intel(b, 1, bit_size, nir_imm_int(b, 0), \
.base = offsetof(struct_name, field_name), \
.range = bit_size / 8)
static nir_def *
_load_param(nir_builder *b, unsigned bit_size, unsigned base, unsigned range)
{
return
(b->shader->info.stage == MESA_SHADER_COMPUTE &&
GFX_VERx10 >= 125) ?
nir_load_shader_indirect_data_intel(
b, 1, bit_size, nir_load_indirect_address_intel(b),
.base = base, .range = range) :
nir_load_push_data_intel(b, 1, bit_size, nir_imm_int(b, 0),
.base = base, .range = range);
}
#define load_param(b, bit_size, struct_name, field_name) \
_load_param(b, bit_size, offsetof(struct_name, field_name), bit_size / 8)
static nir_def *
load_fragment_index(nir_builder *b)