From df06d117c5d9a482aa225a4e0118daa8ca15ac66 Mon Sep 17 00:00:00 2001 From: Lionel Landwerlin Date: Mon, 9 Mar 2026 20:41:34 +0200 Subject: [PATCH] anv: fix internal compute shader constant data pull Forgot to update this path that must now use the new intrinsic. Signed-off-by: Lionel Landwerlin Closes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/15012 Fixes: 9f2215b480 ("anv/brw: remove push constant load emulation from the backend compiler") Tested-by: Felix DeGrood Part-of: --- src/intel/vulkan/genX_internal_kernels.c | 19 +++++++++++++++---- 1 file changed, 15 insertions(+), 4 deletions(-) diff --git a/src/intel/vulkan/genX_internal_kernels.c b/src/intel/vulkan/genX_internal_kernels.c index 7ddcb52f215..ad603e08230 100644 --- a/src/intel/vulkan/genX_internal_kernels.c +++ b/src/intel/vulkan/genX_internal_kernels.c @@ -28,10 +28,21 @@ #include "genxml/gen_macros.h" -#define load_param(b, bit_size, struct_name, field_name) \ - nir_load_push_data_intel(b, 1, bit_size, nir_imm_int(b, 0), \ - .base = offsetof(struct_name, field_name), \ - .range = bit_size / 8) +static nir_def * +_load_param(nir_builder *b, unsigned bit_size, unsigned base, unsigned range) +{ + return + (b->shader->info.stage == MESA_SHADER_COMPUTE && + GFX_VERx10 >= 125) ? + nir_load_shader_indirect_data_intel( + b, 1, bit_size, nir_load_indirect_address_intel(b), + .base = base, .range = range) : + nir_load_push_data_intel(b, 1, bit_size, nir_imm_int(b, 0), + .base = base, .range = range); +} + +#define load_param(b, bit_size, struct_name, field_name) \ + _load_param(b, bit_size, offsetof(struct_name, field_name), bit_size / 8) static nir_def * load_fragment_index(nir_builder *b)