From dead1682000b1a0c7d895e4a688e2062b334bed5 Mon Sep 17 00:00:00 2001 From: Job Noorman Date: Thu, 15 Aug 2024 08:46:36 +0200 Subject: [PATCH] ir3: make fullsync sync after shared writes fullsync would only sync after cat4/5/6 instructions. However, since the introduction of scalar ALU, we also need to sync after writes to shared registers. This commit fixes this by using the is_ss/sy_producer helpers. This should also catch all cases where (ss) is need for WAR hazards. Signed-off-by: Job Noorman Part-of: --- src/freedreno/ir3/ir3_legalize.c | 3 +-- 1 file changed, 1 insertion(+), 2 deletions(-) diff --git a/src/freedreno/ir3/ir3_legalize.c b/src/freedreno/ir3/ir3_legalize.c index aa0af46cb94..fc66882038a 100644 --- a/src/freedreno/ir3/ir3_legalize.c +++ b/src/freedreno/ir3/ir3_legalize.c @@ -1350,8 +1350,7 @@ dbg_sync_sched(struct ir3 *ir, struct ir3_shader_variant *so) { foreach_block (block, &ir->block_list) { foreach_instr_safe (instr, &block->instr_list) { - if (opc_cat(instr->opc) == 4 || opc_cat(instr->opc) == 5 || - opc_cat(instr->opc) == 6) { + if (is_ss_producer(instr) || is_sy_producer(instr)) { struct ir3_instruction *nop = ir3_NOP(block); nop->flags |= IR3_INSTR_SS | IR3_INSTR_SY; ir3_instr_move_after(nop, instr);