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anv: disable preemption on VFG, Wa_14015207028 for DG2
This workaround disables batch level preemption for Polygon, Trifan and Lineloop primitive topologies. v2: cleanups (José) Signed-off-by: Tapani Pälli <tapani.palli@intel.com> Reviewed-by: José Roberto de Souza <jose.souza@intel.com> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/18456>
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1 changed files with 13 additions and 0 deletions
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@ -322,6 +322,7 @@ init_render_queue_state(struct anv_queue *queue)
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}
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}
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}
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}
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#if GFX_VERx10 < 125
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/* an unknown issue is causing vs push constants to become
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/* an unknown issue is causing vs push constants to become
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* corrupted during object-level preemption. For now, restrict
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* corrupted during object-level preemption. For now, restrict
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* to command buffer level preemption to avoid rendering
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* to command buffer level preemption to avoid rendering
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@ -336,6 +337,18 @@ init_render_queue_state(struct anv_queue *queue)
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cc1.DisablePreemptionandHighPriorityPausingdueto3DPRIMITIVECommandMask = true;
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cc1.DisablePreemptionandHighPriorityPausingdueto3DPRIMITIVECommandMask = true;
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#endif
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#endif
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}
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}
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#endif
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/* Wa_14015207028
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*
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* Disable batch level preemption for some primitive topologies.
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*/
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#if GFX_VERx10 == 125
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anv_batch_write_reg(&batch, GENX(VFG_PREEMPTION_CHICKEN_BITS), vfgc) {
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vfgc.PolygonTrifanLineLoopPreemptionDisable = true;
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vfgc.PolygonTrifanLineLoopPreemptionDisableMask = true;
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}
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#endif
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#if GFX_VERx10 == 120
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#if GFX_VERx10 == 120
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/* Wa_1806527549 says to disable the following HiZ optimization when the
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/* Wa_1806527549 says to disable the following HiZ optimization when the
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