From dd3c7756cc486812360f91c3da8317537cedef66 Mon Sep 17 00:00:00 2001 From: Georg Lehmann Date: Wed, 3 Jun 2026 17:20:07 +0200 Subject: [PATCH] radv/gfx11+: program INST_PREF_SIZE for compute Reviewed-by: Samuel Pitoiset Part-of: --- src/amd/vulkan/radv_device.c | 1 + src/amd/vulkan/radv_shader.c | 21 +++++++++++++++++++++ src/amd/vulkan/radv_shader.h | 3 ++- 3 files changed, 24 insertions(+), 1 deletion(-) diff --git a/src/amd/vulkan/radv_device.c b/src/amd/vulkan/radv_device.c index a19e3e65508..f8bd448cbd1 100644 --- a/src/amd/vulkan/radv_device.c +++ b/src/amd/vulkan/radv_device.c @@ -1172,6 +1172,7 @@ radv_device_init_compiler_info(struct radv_device *device) .hw = { .address32_hi = pdev->info.address32_hi, + .instr_prefetch_distance = pdev->info.instr_prefetch_distance, .address_prt_wa_control_bit = pdev->info.address_prt_wa_control_bit, .rbplus_allowed = pdev->info.rbplus_allowed, }, diff --git a/src/amd/vulkan/radv_shader.c b/src/amd/vulkan/radv_shader.c index 2ef4d1c5c37..0e9055d4f57 100644 --- a/src/amd/vulkan/radv_shader.c +++ b/src/amd/vulkan/radv_shader.c @@ -1613,6 +1613,15 @@ radv_open_rtld_binary(enum amd_gfx_level gfx_level, const struct radv_shader_bin } #endif +static unsigned +radv_get_inst_pref_size(const struct radv_compiler_info *compiler_info, unsigned exec_size) +{ + enum amd_gfx_level gfx_level = compiler_info->ac->gfx_level; + unsigned prefetch_distance = compiler_info->hw.instr_prefetch_distance; + + return ac_get_instr_prefetch_size(gfx_level, prefetch_distance, exec_size); +} + static unsigned radv_get_num_pos_exports(const struct radv_shader_info *info, unsigned *clip_dist_mask, unsigned *cull_dist_mask) { @@ -2142,6 +2151,7 @@ radv_postprocess_binary_config(const struct radv_compiler_info *compiler_info, s { enum amd_gfx_level gfx_level = compiler_info->ac->gfx_level; struct ac_shader_config *config = &binary->config; + unsigned exec_size; if (binary->type == RADV_BINARY_TYPE_RTLD) { #if !defined(USE_LIBELF) @@ -2153,6 +2163,8 @@ radv_postprocess_binary_config(const struct radv_compiler_info *compiler_info, s return false; } + exec_size = rtld_binary.exec_size; + if (!ac_rtld_read_config(compiler_info->ac, &rtld_binary, config)) { ac_rtld_close(&rtld_binary); return false; @@ -2163,6 +2175,10 @@ radv_postprocess_binary_config(const struct radv_compiler_info *compiler_info, s ac_rtld_close(&rtld_binary); #endif + } else { + struct radv_shader_binary_legacy *bin = (struct radv_shader_binary_legacy *)binary; + + exec_size = bin->exec_size; } const struct radv_shader_info *info = &binary->info; @@ -2374,6 +2390,11 @@ radv_postprocess_binary_config(const struct radv_compiler_info *compiler_info, s S_00B84C_EXCP_EN(excp_en) | S_00B84C_EXCP_EN_MSB(excp_en_msb); config->rsrc3 |= S_00B8A0_SHARED_VGPR_CNT(num_shared_vgpr_blocks); + if (gfx_level >= GFX12) + config->rsrc3 |= S_00B8A0_INST_PREF_SIZE_GFX12(radv_get_inst_pref_size(compiler_info, exec_size)); + else if (gfx_level >= GFX11) + config->rsrc3 |= S_00B8A0_INST_PREF_SIZE_GFX11(radv_get_inst_pref_size(compiler_info, exec_size)); + break; default: UNREACHABLE("unsupported shader type"); diff --git a/src/amd/vulkan/radv_shader.h b/src/amd/vulkan/radv_shader.h index b5299fa9a54..c682fab3252 100644 --- a/src/amd/vulkan/radv_shader.h +++ b/src/amd/vulkan/radv_shader.h @@ -516,9 +516,10 @@ struct radv_compiler_info { struct { uint32_t address32_hi; + uint32_t instr_prefetch_distance : 8; uint32_t rbplus_allowed : 1; uint32_t address_prt_wa_control_bit : 8; - uint32_t padding : 23; + uint32_t padding : 15; } hw; /* Misc values included as part of the cache key */