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https://gitlab.freedesktop.org/mesa/mesa.git
synced 2025-12-21 09:20:12 +01:00
radv: Implement FS layer ID input as a system value.
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/32641>
This commit is contained in:
parent
b06b62bb13
commit
dd00b3f527
6 changed files with 18 additions and 40 deletions
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@ -355,6 +355,9 @@ lower_abi_instr(nir_builder *b, nir_intrinsic_instr *intrin, void *state)
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replacement = nir_imm_int(b, s->gfx_state->ms.rasterization_samples);
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replacement = nir_imm_int(b, s->gfx_state->ms.rasterization_samples);
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}
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}
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break;
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break;
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case nir_intrinsic_load_layer_id:
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replacement = ac_nir_unpack_arg(b, &s->args->ac, s->args->ac.ancillary, 16, s->gfx_level >= GFX12 ? 14 : 13);
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break;
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case nir_intrinsic_load_provoking_vtx_in_prim_amd: {
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case nir_intrinsic_load_provoking_vtx_in_prim_amd: {
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if (s->gfx_state->dynamic_provoking_vtx_mode) {
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if (s->gfx_state->dynamic_provoking_vtx_mode) {
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replacement = GET_SGPR_FIELD_NIR(s->args->ngg_state, NGG_STATE_PROVOKING_VTX);
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replacement = GET_SGPR_FIELD_NIR(s->args->ngg_state, NGG_STATE_PROVOKING_VTX);
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@ -89,14 +89,10 @@ radv_recompute_fs_input_bases_callback(UNUSED nir_builder *b, nir_intrinsic_inst
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new_base = s->num_always_per_vertex;
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new_base = s->num_always_per_vertex;
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switch (location_bit) {
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switch (location_bit) {
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case VARYING_BIT_LAYER:
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break;
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case VARYING_BIT_VIEWPORT:
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case VARYING_BIT_VIEWPORT:
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new_base += !!(s->potentially_per_primitive & VARYING_BIT_LAYER);
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break;
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break;
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case VARYING_BIT_PRIMITIVE_ID:
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case VARYING_BIT_PRIMITIVE_ID:
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new_base += !!(s->potentially_per_primitive & VARYING_BIT_LAYER) +
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new_base += !!(s->potentially_per_primitive & VARYING_BIT_VIEWPORT);
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!!(s->potentially_per_primitive & VARYING_BIT_VIEWPORT);
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break;
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break;
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}
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}
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} else if (location_bit & s->always_per_primitive) {
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} else if (location_bit & s->always_per_primitive) {
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@ -117,14 +113,13 @@ radv_recompute_fs_input_bases_callback(UNUSED nir_builder *b, nir_intrinsic_inst
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bool
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bool
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radv_recompute_fs_input_bases(nir_shader *nir)
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radv_recompute_fs_input_bases(nir_shader *nir)
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{
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{
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const uint64_t always_per_vertex = nir->info.inputs_read & ~nir->info.per_primitive_inputs &
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const uint64_t always_per_vertex =
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~(VARYING_BIT_PRIMITIVE_ID | VARYING_BIT_LAYER | VARYING_BIT_VIEWPORT);
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nir->info.inputs_read & ~nir->info.per_primitive_inputs & ~(VARYING_BIT_PRIMITIVE_ID | VARYING_BIT_VIEWPORT);
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const uint64_t potentially_per_primitive =
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const uint64_t potentially_per_primitive = nir->info.inputs_read & (VARYING_BIT_PRIMITIVE_ID | VARYING_BIT_VIEWPORT);
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nir->info.inputs_read & (VARYING_BIT_PRIMITIVE_ID | VARYING_BIT_LAYER | VARYING_BIT_VIEWPORT);
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const uint64_t always_per_primitive = nir->info.inputs_read & nir->info.per_primitive_inputs &
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const uint64_t always_per_primitive =
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~(VARYING_BIT_PRIMITIVE_ID | VARYING_BIT_LAYER | VARYING_BIT_VIEWPORT);
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nir->info.inputs_read & nir->info.per_primitive_inputs & ~(VARYING_BIT_PRIMITIVE_ID | VARYING_BIT_VIEWPORT);
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radv_recompute_fs_input_bases_state s = {
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radv_recompute_fs_input_bases_state s = {
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.always_per_vertex = always_per_vertex,
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.always_per_vertex = always_per_vertex,
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@ -167,6 +162,9 @@ radv_nir_lower_io(struct radv_device *device, nir_shader *nir)
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}
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}
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if (nir->info.stage == MESA_SHADER_FRAGMENT) {
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if (nir->info.stage == MESA_SHADER_FRAGMENT) {
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/* Lower explicit input load intrinsics to sysvals for the layer ID. */
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NIR_PASS(_, nir, nir_lower_system_values);
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/* Recompute FS input intrinsic bases to assign a location to each FS input.
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/* Recompute FS input intrinsic bases to assign a location to each FS input.
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* The computed base will match the index of each input in SPI_PS_INPUT_CNTL_n.
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* The computed base will match the index of each input in SPI_PS_INPUT_CNTL_n.
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*/
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*/
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@ -10,19 +10,6 @@
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#include "nir_builder.h"
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#include "nir_builder.h"
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#include "radv_nir.h"
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#include "radv_nir.h"
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static nir_variable *
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find_layer_in_var(nir_shader *nir)
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{
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nir_variable *var = nir_find_variable_with_location(nir, nir_var_shader_in, VARYING_SLOT_LAYER);
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if (var != NULL)
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return var;
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var = nir_variable_create(nir, nir_var_shader_in, glsl_int_type(), "layer id");
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var->data.location = VARYING_SLOT_LAYER;
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var->data.interpolation = INTERP_MODE_FLAT;
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return var;
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}
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/**
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/**
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* We use layered rendering to implement multiview, which means we need to map
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* We use layered rendering to implement multiview, which means we need to map
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* view_index to gl_Layer. The code generates a load from the layer_id sysval,
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* view_index to gl_Layer. The code generates a load from the layer_id sysval,
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@ -39,7 +26,6 @@ radv_nir_lower_view_index(nir_shader *nir)
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nir_function_impl *entry = nir_shader_get_entrypoint(nir);
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nir_function_impl *entry = nir_shader_get_entrypoint(nir);
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nir_builder b = nir_builder_create(entry);
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nir_builder b = nir_builder_create(entry);
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nir_variable *layer = NULL;
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nir_foreach_block (block, entry) {
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nir_foreach_block (block, entry) {
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nir_foreach_instr_safe (instr, block) {
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nir_foreach_instr_safe (instr, block) {
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if (instr->type != nir_instr_type_intrinsic)
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if (instr->type != nir_instr_type_intrinsic)
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@ -49,16 +35,10 @@ radv_nir_lower_view_index(nir_shader *nir)
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if (load->intrinsic != nir_intrinsic_load_view_index)
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if (load->intrinsic != nir_intrinsic_load_view_index)
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continue;
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continue;
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if (!layer)
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layer = find_layer_in_var(nir);
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b.cursor = nir_before_instr(instr);
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b.cursor = nir_before_instr(instr);
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nir_def *def = nir_load_var(&b, layer);
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nir_def *def = nir_load_layer_id(&b);
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nir_def_rewrite_uses(&load->def, def);
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nir_def_rewrite_uses(&load->def, def);
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/* Update inputs_read to reflect that the pass added a new input. */
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nir->info.inputs_read |= VARYING_BIT_LAYER;
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nir_instr_remove(instr);
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nir_instr_remove(instr);
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progress = true;
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progress = true;
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}
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}
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@ -2557,11 +2557,6 @@ radv_emit_ps_inputs(struct radv_cmd_buffer *cmd_buffer)
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input_mask_to_ps_inputs(outinfo, ps, ps->info.ps.input_mask, ps_input_cntl, &ps_offset, radv_ps_in_flat);
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input_mask_to_ps_inputs(outinfo, ps, ps->info.ps.input_mask, ps_input_cntl, &ps_offset, radv_ps_in_flat);
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/* Potentially per-primitive PS inputs */
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/* Potentially per-primitive PS inputs */
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if (ps->info.ps.layer_input) {
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num_per_primitive_params += !!outinfo->writes_layer_per_primitive;
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const enum radv_ps_in_type t = outinfo->writes_layer_per_primitive ? per_prim : radv_ps_in_flat;
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ps_input_cntl[ps_offset++] = offset_to_ps_input(outinfo->vs_output_param_offset[VARYING_SLOT_LAYER], t);
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}
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if (ps->info.ps.viewport_index_input) {
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if (ps->info.ps.viewport_index_input) {
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num_per_primitive_params += !!outinfo->writes_viewport_index_per_primitive;
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num_per_primitive_params += !!outinfo->writes_viewport_index_per_primitive;
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const enum radv_ps_in_type t = outinfo->writes_viewport_index_per_primitive ? per_prim : radv_ps_in_flat;
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const enum radv_ps_in_type t = outinfo->writes_viewport_index_per_primitive ? per_prim : radv_ps_in_flat;
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@ -65,6 +65,7 @@ get_nir_options_for_stage(struct radv_physical_device *pdev, gl_shader_stage sta
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options->lower_doubles_options = nir_lower_drcp | nir_lower_dsqrt | nir_lower_drsq | nir_lower_ddiv;
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options->lower_doubles_options = nir_lower_drcp | nir_lower_dsqrt | nir_lower_drsq | nir_lower_ddiv;
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options->io_options |= nir_io_mediump_is_32bit;
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options->io_options |= nir_io_mediump_is_32bit;
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options->varying_expression_max_cost = ac_nir_varying_expression_max_cost;
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options->varying_expression_max_cost = ac_nir_varying_expression_max_cost;
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options->lower_layer_fs_input_to_sysval = true;
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}
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}
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void
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void
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@ -431,7 +432,7 @@ radv_shader_spirv_to_nir(struct radv_device *device, const struct radv_shader_st
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NIR_PASS(_, nir, nir_lower_input_attachments,
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NIR_PASS(_, nir, nir_lower_input_attachments,
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&(nir_input_attachment_options){
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&(nir_input_attachment_options){
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.use_fragcoord_sysval = true,
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.use_fragcoord_sysval = true,
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.use_layer_id_sysval = false,
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.use_layer_id_sysval = true,
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});
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});
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nir_remove_dead_variables_options dead_vars_opts = {
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nir_remove_dead_variables_options dead_vars_opts = {
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@ -3520,7 +3521,8 @@ radv_compute_spi_ps_input(const struct radv_physical_device *pdev, const struct
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}
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}
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}
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}
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if (info->ps.reads_sample_id || info->ps.reads_frag_shading_rate || info->ps.reads_sample_mask_in) {
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if (info->ps.reads_sample_id || info->ps.reads_frag_shading_rate || info->ps.reads_sample_mask_in ||
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info->ps.layer_input) {
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spi_ps_input |= S_0286CC_ANCILLARY_ENA(1);
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spi_ps_input |= S_0286CC_ANCILLARY_ENA(1);
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}
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}
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@ -952,7 +952,7 @@ gather_shader_info_fs(const struct radv_device *device, const nir_shader *nir,
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info->ps.writes_memory = nir->info.writes_memory;
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info->ps.writes_memory = nir->info.writes_memory;
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info->ps.has_pcoord = nir->info.inputs_read & VARYING_BIT_PNTC;
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info->ps.has_pcoord = nir->info.inputs_read & VARYING_BIT_PNTC;
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info->ps.prim_id_input = nir->info.inputs_read & VARYING_BIT_PRIMITIVE_ID;
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info->ps.prim_id_input = nir->info.inputs_read & VARYING_BIT_PRIMITIVE_ID;
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info->ps.layer_input = nir->info.inputs_read & VARYING_BIT_LAYER;
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info->ps.layer_input = BITSET_TEST(nir->info.system_values_read, SYSTEM_VALUE_LAYER_ID);
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info->ps.viewport_index_input = nir->info.inputs_read & VARYING_BIT_VIEWPORT;
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info->ps.viewport_index_input = nir->info.inputs_read & VARYING_BIT_VIEWPORT;
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info->ps.writes_z = nir->info.outputs_written & BITFIELD64_BIT(FRAG_RESULT_DEPTH);
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info->ps.writes_z = nir->info.outputs_written & BITFIELD64_BIT(FRAG_RESULT_DEPTH);
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info->ps.writes_stencil = nir->info.outputs_written & BITFIELD64_BIT(FRAG_RESULT_STENCIL);
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info->ps.writes_stencil = nir->info.outputs_written & BITFIELD64_BIT(FRAG_RESULT_STENCIL);
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