diff --git a/src/amd/vulkan/nir/radv_nir_lower_abi.c b/src/amd/vulkan/nir/radv_nir_lower_abi.c
index ad3857a5c99..c3e5fd119bd 100644
--- a/src/amd/vulkan/nir/radv_nir_lower_abi.c
+++ b/src/amd/vulkan/nir/radv_nir_lower_abi.c
@@ -355,6 +355,9 @@ lower_abi_instr(nir_builder *b, nir_intrinsic_instr *intrin, void *state)
          replacement = nir_imm_int(b, s->gfx_state->ms.rasterization_samples);
       }
       break;
+   case nir_intrinsic_load_layer_id:
+      replacement = ac_nir_unpack_arg(b, &s->args->ac, s->args->ac.ancillary, 16, s->gfx_level >= GFX12 ? 14 : 13);
+      break;
    case nir_intrinsic_load_provoking_vtx_in_prim_amd: {
       if (s->gfx_state->dynamic_provoking_vtx_mode) {
          replacement = GET_SGPR_FIELD_NIR(s->args->ngg_state, NGG_STATE_PROVOKING_VTX);
diff --git a/src/amd/vulkan/nir/radv_nir_lower_io.c b/src/amd/vulkan/nir/radv_nir_lower_io.c
index 60801848336..5cd6f0b4b4d 100644
--- a/src/amd/vulkan/nir/radv_nir_lower_io.c
+++ b/src/amd/vulkan/nir/radv_nir_lower_io.c
@@ -89,14 +89,10 @@ radv_recompute_fs_input_bases_callback(UNUSED nir_builder *b, nir_intrinsic_inst
       new_base = s->num_always_per_vertex;
 
       switch (location_bit) {
-      case VARYING_BIT_LAYER:
-         break;
       case VARYING_BIT_VIEWPORT:
-         new_base += !!(s->potentially_per_primitive & VARYING_BIT_LAYER);
          break;
       case VARYING_BIT_PRIMITIVE_ID:
-         new_base += !!(s->potentially_per_primitive & VARYING_BIT_LAYER) +
-                     !!(s->potentially_per_primitive & VARYING_BIT_VIEWPORT);
+         new_base += !!(s->potentially_per_primitive & VARYING_BIT_VIEWPORT);
          break;
       }
    } else if (location_bit & s->always_per_primitive) {
@@ -117,14 +113,13 @@ radv_recompute_fs_input_bases_callback(UNUSED nir_builder *b, nir_intrinsic_inst
 bool
 radv_recompute_fs_input_bases(nir_shader *nir)
 {
-   const uint64_t always_per_vertex = nir->info.inputs_read & ~nir->info.per_primitive_inputs &
-                                      ~(VARYING_BIT_PRIMITIVE_ID | VARYING_BIT_LAYER | VARYING_BIT_VIEWPORT);
+   const uint64_t always_per_vertex =
+      nir->info.inputs_read & ~nir->info.per_primitive_inputs & ~(VARYING_BIT_PRIMITIVE_ID | VARYING_BIT_VIEWPORT);
 
-   const uint64_t potentially_per_primitive =
-      nir->info.inputs_read & (VARYING_BIT_PRIMITIVE_ID | VARYING_BIT_LAYER | VARYING_BIT_VIEWPORT);
+   const uint64_t potentially_per_primitive = nir->info.inputs_read & (VARYING_BIT_PRIMITIVE_ID | VARYING_BIT_VIEWPORT);
 
-   const uint64_t always_per_primitive = nir->info.inputs_read & nir->info.per_primitive_inputs &
-                                         ~(VARYING_BIT_PRIMITIVE_ID | VARYING_BIT_LAYER | VARYING_BIT_VIEWPORT);
+   const uint64_t always_per_primitive =
+      nir->info.inputs_read & nir->info.per_primitive_inputs & ~(VARYING_BIT_PRIMITIVE_ID | VARYING_BIT_VIEWPORT);
 
    radv_recompute_fs_input_bases_state s = {
       .always_per_vertex = always_per_vertex,
@@ -167,6 +162,9 @@ radv_nir_lower_io(struct radv_device *device, nir_shader *nir)
    }
 
    if (nir->info.stage == MESA_SHADER_FRAGMENT) {
+      /* Lower explicit input load intrinsics to sysvals for the layer ID. */
+      NIR_PASS(_, nir, nir_lower_system_values);
+
       /* Recompute FS input intrinsic bases to assign a location to each FS input.
        * The computed base will match the index of each input in SPI_PS_INPUT_CNTL_n.
        */
diff --git a/src/amd/vulkan/nir/radv_nir_lower_view_index.c b/src/amd/vulkan/nir/radv_nir_lower_view_index.c
index 62ab136ad5c..96de61921b1 100644
--- a/src/amd/vulkan/nir/radv_nir_lower_view_index.c
+++ b/src/amd/vulkan/nir/radv_nir_lower_view_index.c
@@ -10,19 +10,6 @@
 #include "nir_builder.h"
 #include "radv_nir.h"
 
-static nir_variable *
-find_layer_in_var(nir_shader *nir)
-{
-   nir_variable *var = nir_find_variable_with_location(nir, nir_var_shader_in, VARYING_SLOT_LAYER);
-   if (var != NULL)
-      return var;
-
-   var = nir_variable_create(nir, nir_var_shader_in, glsl_int_type(), "layer id");
-   var->data.location = VARYING_SLOT_LAYER;
-   var->data.interpolation = INTERP_MODE_FLAT;
-   return var;
-}
-
 /**
  * We use layered rendering to implement multiview, which means we need to map
  * view_index to gl_Layer. The code generates a load from the layer_id sysval,
@@ -39,7 +26,6 @@ radv_nir_lower_view_index(nir_shader *nir)
    nir_function_impl *entry = nir_shader_get_entrypoint(nir);
    nir_builder b = nir_builder_create(entry);
 
-   nir_variable *layer = NULL;
    nir_foreach_block (block, entry) {
       nir_foreach_instr_safe (instr, block) {
          if (instr->type != nir_instr_type_intrinsic)
@@ -49,16 +35,10 @@ radv_nir_lower_view_index(nir_shader *nir)
          if (load->intrinsic != nir_intrinsic_load_view_index)
             continue;
 
-         if (!layer)
-            layer = find_layer_in_var(nir);
-
          b.cursor = nir_before_instr(instr);
-         nir_def *def = nir_load_var(&b, layer);
+         nir_def *def = nir_load_layer_id(&b);
          nir_def_rewrite_uses(&load->def, def);
 
-         /* Update inputs_read to reflect that the pass added a new input. */
-         nir->info.inputs_read |= VARYING_BIT_LAYER;
-
          nir_instr_remove(instr);
          progress = true;
       }
diff --git a/src/amd/vulkan/radv_cmd_buffer.c b/src/amd/vulkan/radv_cmd_buffer.c
index 476776f2b2c..f8613dfb9d9 100644
--- a/src/amd/vulkan/radv_cmd_buffer.c
+++ b/src/amd/vulkan/radv_cmd_buffer.c
@@ -2557,11 +2557,6 @@ radv_emit_ps_inputs(struct radv_cmd_buffer *cmd_buffer)
    input_mask_to_ps_inputs(outinfo, ps, ps->info.ps.input_mask, ps_input_cntl, &ps_offset, radv_ps_in_flat);
 
    /* Potentially per-primitive PS inputs */
-   if (ps->info.ps.layer_input) {
-      num_per_primitive_params += !!outinfo->writes_layer_per_primitive;
-      const enum radv_ps_in_type t = outinfo->writes_layer_per_primitive ? per_prim : radv_ps_in_flat;
-      ps_input_cntl[ps_offset++] = offset_to_ps_input(outinfo->vs_output_param_offset[VARYING_SLOT_LAYER], t);
-   }
    if (ps->info.ps.viewport_index_input) {
       num_per_primitive_params += !!outinfo->writes_viewport_index_per_primitive;
       const enum radv_ps_in_type t = outinfo->writes_viewport_index_per_primitive ? per_prim : radv_ps_in_flat;
diff --git a/src/amd/vulkan/radv_shader.c b/src/amd/vulkan/radv_shader.c
index 26e408e6a06..205b8f7f81e 100644
--- a/src/amd/vulkan/radv_shader.c
+++ b/src/amd/vulkan/radv_shader.c
@@ -65,6 +65,7 @@ get_nir_options_for_stage(struct radv_physical_device *pdev, gl_shader_stage sta
    options->lower_doubles_options = nir_lower_drcp | nir_lower_dsqrt | nir_lower_drsq | nir_lower_ddiv;
    options->io_options |= nir_io_mediump_is_32bit;
    options->varying_expression_max_cost = ac_nir_varying_expression_max_cost;
+   options->lower_layer_fs_input_to_sysval = true;
 }
 
 void
@@ -431,7 +432,7 @@ radv_shader_spirv_to_nir(struct radv_device *device, const struct radv_shader_st
          NIR_PASS(_, nir, nir_lower_input_attachments,
                   &(nir_input_attachment_options){
                      .use_fragcoord_sysval = true,
-                     .use_layer_id_sysval = false,
+                     .use_layer_id_sysval = true,
                   });
 
       nir_remove_dead_variables_options dead_vars_opts = {
@@ -3520,7 +3521,8 @@ radv_compute_spi_ps_input(const struct radv_physical_device *pdev, const struct
       }
    }
 
-   if (info->ps.reads_sample_id || info->ps.reads_frag_shading_rate || info->ps.reads_sample_mask_in) {
+   if (info->ps.reads_sample_id || info->ps.reads_frag_shading_rate || info->ps.reads_sample_mask_in ||
+       info->ps.layer_input) {
       spi_ps_input |= S_0286CC_ANCILLARY_ENA(1);
    }
 
diff --git a/src/amd/vulkan/radv_shader_info.c b/src/amd/vulkan/radv_shader_info.c
index 3fd92d34e6f..466f3327066 100644
--- a/src/amd/vulkan/radv_shader_info.c
+++ b/src/amd/vulkan/radv_shader_info.c
@@ -952,7 +952,7 @@ gather_shader_info_fs(const struct radv_device *device, const nir_shader *nir,
    info->ps.writes_memory = nir->info.writes_memory;
    info->ps.has_pcoord = nir->info.inputs_read & VARYING_BIT_PNTC;
    info->ps.prim_id_input = nir->info.inputs_read & VARYING_BIT_PRIMITIVE_ID;
-   info->ps.layer_input = nir->info.inputs_read & VARYING_BIT_LAYER;
+   info->ps.layer_input = BITSET_TEST(nir->info.system_values_read, SYSTEM_VALUE_LAYER_ID);
    info->ps.viewport_index_input = nir->info.inputs_read & VARYING_BIT_VIEWPORT;
    info->ps.writes_z = nir->info.outputs_written & BITFIELD64_BIT(FRAG_RESULT_DEPTH);
    info->ps.writes_stencil = nir->info.outputs_written & BITFIELD64_BIT(FRAG_RESULT_STENCIL);