From dc5e84d47de270e313be82ff1a902b889653b9b0 Mon Sep 17 00:00:00 2001 From: Samuel Pitoiset Date: Mon, 30 Mar 2026 17:40:50 +0200 Subject: [PATCH] radv: fix a typo when determining if a VS needs a prolog This is harmless because shader_stages is filtered based on lib flags. Also improve the comment while I'm at it. Signed-off-by: Samuel Pitoiset Part-of: --- src/amd/vulkan/radv_pipeline_graphics.c | 6 ++++-- 1 file changed, 4 insertions(+), 2 deletions(-) diff --git a/src/amd/vulkan/radv_pipeline_graphics.c b/src/amd/vulkan/radv_pipeline_graphics.c index c93441a0d6c..1656ba9ff2c 100644 --- a/src/amd/vulkan/radv_pipeline_graphics.c +++ b/src/amd/vulkan/radv_pipeline_graphics.c @@ -1943,8 +1943,10 @@ radv_generate_graphics_state_key(const struct radv_device *device, const struct key.vs.has_prolog = true; } - /* Compile the pre-rasterization stages only when the vertex input interface is missing. */ - if ((state->shader_stages && VK_SHADER_STAGE_VERTEX_BIT) && !state->vi) { + /* Make sure to require a VS prolog when the VS is compiled without the vertex input state (this + * can happen with GPL). + */ + if ((state->shader_stages & VK_SHADER_STAGE_VERTEX_BIT) && !state->vi) { key.vs.has_prolog = true; }