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radeonsi: make si_pm4_cmd_begin/end static and simplify all usages

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There is no longer the confusing trailing si_pm4_cmd_end call.

Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5603>
This commit is contained in:
Marek Olšák 2020-06-15 22:39:00 -04:00 • committed by Marge Bot
parent 7b2a0f880b
commit da78d50bc8
4 changed files with 8 additions and 15 deletions
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8
src/gallium/drivers/radeonsi/si_pm4.c
View file

@ -26,24 +26,24 @@
#include "sid.h" #include "sid.h"
#include "util/u_memory.h" #include "util/u_memory.h"
void si_pm4_cmd_begin(struct si_pm4_state *state, unsigned opcode) static void si_pm4_cmd_begin(struct si_pm4_state *state, unsigned opcode)
{ {
assert(state->ndw < SI_PM4_MAX_DW);
state->last_opcode = opcode; state->last_opcode = opcode;
state->last_pm4 = state->ndw++; state->last_pm4 = state->ndw++;
} }
void si_pm4_cmd_add(struct si_pm4_state *state, uint32_t dw) void si_pm4_cmd_add(struct si_pm4_state *state, uint32_t dw)
{ {
assert(state->ndw < SI_PM4_MAX_DW);
state->pm4[state->ndw++] = dw; state->pm4[state->ndw++] = dw;
} }
void si_pm4_cmd_end(struct si_pm4_state *state, bool predicate) static void si_pm4_cmd_end(struct si_pm4_state *state, bool predicate)
{ {
unsigned count; unsigned count;
count = state->ndw - state->last_pm4 - 2; count = state->ndw - state->last_pm4 - 2;
state->pm4[state->last_pm4] = PKT3(state->last_opcode, count, predicate); state->pm4[state->last_pm4] = PKT3(state->last_opcode, count, predicate);
assert(state->ndw <= SI_PM4_MAX_DW);
} }
void si_pm4_set_reg(struct si_pm4_state *state, unsigned reg, uint32_t val) void si_pm4_set_reg(struct si_pm4_state *state, unsigned reg, uint32_t val)

3
src/gallium/drivers/radeonsi/si_pm4.h
View file

@ -54,10 +54,7 @@ struct si_pm4_state {
struct si_atom atom; struct si_atom atom;
}; };
void si_pm4_cmd_begin(struct si_pm4_state *state, unsigned opcode);
void si_pm4_cmd_add(struct si_pm4_state *state, uint32_t dw); void si_pm4_cmd_add(struct si_pm4_state *state, uint32_t dw);
void si_pm4_cmd_end(struct si_pm4_state *state, bool predicate);
void si_pm4_set_reg(struct si_pm4_state *state, unsigned reg, uint32_t val); void si_pm4_set_reg(struct si_pm4_state *state, unsigned reg, uint32_t val);
void si_pm4_clear_state(struct si_pm4_state *state); void si_pm4_clear_state(struct si_pm4_state *state);

6
src/gallium/drivers/radeonsi/si_state.c
View file

@ -5118,15 +5118,13 @@ void si_init_cs_preamble_state(struct si_context *sctx)
if (!pm4) if (!pm4)
return; return;
si_pm4_cmd_begin(pm4, PKT3_CONTEXT_CONTROL); si_pm4_cmd_add(pm4, PKT3(PKT3_CONTEXT_CONTROL, 1, 0));
si_pm4_cmd_add(pm4, CC0_UPDATE_LOAD_ENABLES(1)); si_pm4_cmd_add(pm4, CC0_UPDATE_LOAD_ENABLES(1));
si_pm4_cmd_add(pm4, CC1_UPDATE_SHADOW_ENABLES(1)); si_pm4_cmd_add(pm4, CC1_UPDATE_SHADOW_ENABLES(1));
si_pm4_cmd_end(pm4, false);
if (has_clear_state) { if (has_clear_state) {
si_pm4_cmd_begin(pm4, PKT3_CLEAR_STATE); si_pm4_cmd_add(pm4, PKT3(PKT3_CLEAR_STATE, 0, 0));
si_pm4_cmd_add(pm4, 0); si_pm4_cmd_add(pm4, 0);
si_pm4_cmd_end(pm4, false);
} }
if (sctx->chip_class <= GFX8) if (sctx->chip_class <= GFX8)

6
src/gallium/drivers/radeonsi/si_state_shaders.c
View file

@ -3293,14 +3293,12 @@ static void si_cs_preamble_add_vgt_flush(struct si_context *sctx)
return; return;
/* Done by Vulkan before VGT_FLUSH. */ /* Done by Vulkan before VGT_FLUSH. */
si_pm4_cmd_begin(sctx->cs_preamble_state, PKT3_EVENT_WRITE); si_pm4_cmd_add(sctx->cs_preamble_state, PKT3(PKT3_EVENT_WRITE, 0, 0));
si_pm4_cmd_add(sctx->cs_preamble_state, EVENT_TYPE(V_028A90_VS_PARTIAL_FLUSH) | EVENT_INDEX(4)); si_pm4_cmd_add(sctx->cs_preamble_state, EVENT_TYPE(V_028A90_VS_PARTIAL_FLUSH) | EVENT_INDEX(4));
si_pm4_cmd_end(sctx->cs_preamble_state, false);
/* VGT_FLUSH is required even if VGT is idle. It resets VGT pointers. */ /* VGT_FLUSH is required even if VGT is idle. It resets VGT pointers. */
si_pm4_cmd_begin(sctx->cs_preamble_state, PKT3_EVENT_WRITE); si_pm4_cmd_add(sctx->cs_preamble_state, PKT3(PKT3_EVENT_WRITE, 0, 0));
si_pm4_cmd_add(sctx->cs_preamble_state, EVENT_TYPE(V_028A90_VGT_FLUSH) | EVENT_INDEX(0)); si_pm4_cmd_add(sctx->cs_preamble_state, EVENT_TYPE(V_028A90_VGT_FLUSH) | EVENT_INDEX(0));
si_pm4_cmd_end(sctx->cs_preamble_state, false);
sctx->cs_preamble_has_vgt_flush = true; sctx->cs_preamble_has_vgt_flush = true;
} }