diff --git a/src/gallium/winsys/amdgpu/drm/amdgpu_cs.cpp b/src/gallium/winsys/amdgpu/drm/amdgpu_cs.cpp
index e1fea99e67c..591c43c2404 100644
--- a/src/gallium/winsys/amdgpu/drm/amdgpu_cs.cpp
+++ b/src/gallium/winsys/amdgpu/drm/amdgpu_cs.cpp
@@ -877,9 +877,9 @@ static enum amd_ip_type amdgpu_cs_get_ip_type(struct radeon_cmdbuf *rcs)
 static bool ip_uses_alt_fence(enum amd_ip_type ip_type)
 {
    /* The alt_fence path can be tested thoroughly by enabling it for GFX here. */
-   return ip_type == AMD_IP_VCN_DEC ||
-          ip_type == AMD_IP_VCN_ENC ||
-          ip_type == AMD_IP_VCN_JPEG;
+   return ip_type != AMD_IP_GFX &&
+          ip_type != AMD_IP_COMPUTE &&
+          ip_type != AMD_IP_SDMA;
 }
 
 static void amdgpu_cs_destroy(struct radeon_cmdbuf *rcs)
diff --git a/src/gallium/winsys/amdgpu/drm/amdgpu_winsys.h b/src/gallium/winsys/amdgpu/drm/amdgpu_winsys.h
index 3e8bea950f9..e3678cf23a6 100644
--- a/src/gallium/winsys/amdgpu/drm/amdgpu_winsys.h
+++ b/src/gallium/winsys/amdgpu/drm/amdgpu_winsys.h
@@ -117,7 +117,7 @@ struct amdgpu_screen_winsys {
 #define AMDGPU_FENCE_RING_SIZE 32
 
 /* The maximum number of queues that can be present. */
-#define AMDGPU_MAX_QUEUES 6
+#define AMDGPU_MAX_QUEUES 3
 
 /* This can use any integer type because the logic handles integer wraparounds robustly, but
  * uint8_t wraps around so quickly that some BOs might never become idle because we don't