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ir3: treat 16b imul as mul.s24

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Signed-off-by: Danylo Piliaiev <dpiliaiev@igalia.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/10054>
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Danylo Piliaiev 2021-04-08 15:06:21 +03:00 • committed by Marge Bot
parent 5bf7475460
commit d918bbfa1c
1 changed files with 4 additions and 0 deletions
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4
src/freedreno/ir3/ir3_compiler_nir.c
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@ -571,6 +571,10 @@ emit_alu(struct ir3_context *ctx, nir_alu_instr *alu)
case nir_op_imad24_ir3:
dst[0] = ir3_MAD_S24(b, src[0], 0, src[1], 0, src[2], 0);
break;
case nir_op_imul:
compile_assert(ctx, nir_dest_bit_size(alu->dest.dest) == 16);
dst[0] = ir3_MUL_S24(b, src[0], 0, src[1], 0);
break;
case nir_op_imul24:
dst[0] = ir3_MUL_S24(b, src[0], 0, src[1], 0);
break;