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radeonsi: move more lowering from si_lower_nir to si_preprocess_nir
Acked-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/38802>
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81adf1ea71
commit
d8f8b57686
2 changed files with 22 additions and 31 deletions
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@ -641,14 +641,34 @@ static void si_preprocess_nir(struct si_nir_shader_ctx *ctx)
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nir_shader *nir = ctx->nir;
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bool progress = false;
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const struct nir_lower_tex_options lower_tex_options = {
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.lower_txp = ~0u,
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.lower_txf_offset = true,
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.lower_txs_cube_array = true,
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.lower_invalid_implicit_lod = true,
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.lower_tg4_offsets = true,
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.lower_to_fragment_fetch_amd = sel->screen->info.gfx_level < GFX11,
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.lower_1d = sel->screen->info.gfx_level == GFX9,
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.optimize_txd = true,
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};
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NIR_PASS(progress, nir, nir_lower_tex, &lower_tex_options);
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const struct nir_lower_image_options lower_image_options = {
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.lower_cube_size = true,
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.lower_to_fragment_mask_load_amd = sel->screen->info.gfx_level < GFX11 &&
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!(sel->screen->debug_flags & DBG(NO_FMASK)),
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};
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NIR_PASS(progress, nir, nir_lower_image, &lower_image_options);
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NIR_PASS(progress, nir, ac_nir_lower_sin_cos);
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NIR_PASS(progress, nir, si_nir_lower_intrinsics_early);
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if (nir->info.stage == MESA_SHADER_TASK) {
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NIR_PASS(progress, nir, ac_nir_lower_task_outputs_to_mem, false);
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} else if (nir->info.stage == MESA_SHADER_MESH) {
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NIR_PASS(progress, nir, ac_nir_lower_mesh_inputs_to_mem);
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}
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NIR_PASS(progress, nir, si_nir_lower_intrinsics_early);
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if (mesa_shader_stage_is_compute(nir->info.stage)) {
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/* gl_LocalInvocationIndex must be derived from gl_LocalInvocationID.xyz to make it correct
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* with quad derivatives. Using gl_SubgroupID for that (which is what we do by default) is
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@ -113,35 +113,6 @@ void si_nir_late_opts(nir_shader *nir)
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*/
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static void si_lower_nir(struct si_screen *sscreen, struct nir_shader *nir)
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{
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/* Perform lowerings (and optimizations) of code.
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*
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* Performance considerations aside, we must:
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* - lower certain ALU operations
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* - ensure constant offsets for texture instructions are folded
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* and copy-propagated
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*/
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const struct nir_lower_tex_options lower_tex_options = {
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.lower_txp = ~0u,
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.lower_txf_offset = true,
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.lower_txs_cube_array = true,
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.lower_invalid_implicit_lod = true,
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.lower_tg4_offsets = true,
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.lower_to_fragment_fetch_amd = sscreen->info.gfx_level < GFX11,
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.lower_1d = sscreen->info.gfx_level == GFX9,
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.optimize_txd = true,
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};
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NIR_PASS(_, nir, nir_lower_tex, &lower_tex_options);
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const struct nir_lower_image_options lower_image_options = {
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.lower_cube_size = true,
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.lower_to_fragment_mask_load_amd = sscreen->info.gfx_level < GFX11 &&
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!(sscreen->debug_flags & DBG(NO_FMASK)),
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};
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NIR_PASS(_, nir, nir_lower_image, &lower_image_options);
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NIR_PASS(_, nir, ac_nir_lower_sin_cos);
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/* Lower load constants to scalar and then clean up the mess */
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NIR_PASS(_, nir, nir_lower_load_const_to_scalar);
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NIR_PASS(_, nir, nir_lower_var_copies);
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NIR_PASS(_, nir, nir_opt_intrinsics);
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