radeonsi: move more lowering from si_lower_nir to si_preprocess_nir

Acked-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/38802>
This commit is contained in:
Marek Olšák 2025-11-21 23:50:18 -05:00 committed by Marge Bot
parent 81adf1ea71
commit d8f8b57686
2 changed files with 22 additions and 31 deletions

View file

@ -641,14 +641,34 @@ static void si_preprocess_nir(struct si_nir_shader_ctx *ctx)
nir_shader *nir = ctx->nir;
bool progress = false;
const struct nir_lower_tex_options lower_tex_options = {
.lower_txp = ~0u,
.lower_txf_offset = true,
.lower_txs_cube_array = true,
.lower_invalid_implicit_lod = true,
.lower_tg4_offsets = true,
.lower_to_fragment_fetch_amd = sel->screen->info.gfx_level < GFX11,
.lower_1d = sel->screen->info.gfx_level == GFX9,
.optimize_txd = true,
};
NIR_PASS(progress, nir, nir_lower_tex, &lower_tex_options);
const struct nir_lower_image_options lower_image_options = {
.lower_cube_size = true,
.lower_to_fragment_mask_load_amd = sel->screen->info.gfx_level < GFX11 &&
!(sel->screen->debug_flags & DBG(NO_FMASK)),
};
NIR_PASS(progress, nir, nir_lower_image, &lower_image_options);
NIR_PASS(progress, nir, ac_nir_lower_sin_cos);
NIR_PASS(progress, nir, si_nir_lower_intrinsics_early);
if (nir->info.stage == MESA_SHADER_TASK) {
NIR_PASS(progress, nir, ac_nir_lower_task_outputs_to_mem, false);
} else if (nir->info.stage == MESA_SHADER_MESH) {
NIR_PASS(progress, nir, ac_nir_lower_mesh_inputs_to_mem);
}
NIR_PASS(progress, nir, si_nir_lower_intrinsics_early);
if (mesa_shader_stage_is_compute(nir->info.stage)) {
/* gl_LocalInvocationIndex must be derived from gl_LocalInvocationID.xyz to make it correct
* with quad derivatives. Using gl_SubgroupID for that (which is what we do by default) is

View file

@ -113,35 +113,6 @@ void si_nir_late_opts(nir_shader *nir)
*/
static void si_lower_nir(struct si_screen *sscreen, struct nir_shader *nir)
{
/* Perform lowerings (and optimizations) of code.
*
* Performance considerations aside, we must:
* - lower certain ALU operations
* - ensure constant offsets for texture instructions are folded
* and copy-propagated
*/
const struct nir_lower_tex_options lower_tex_options = {
.lower_txp = ~0u,
.lower_txf_offset = true,
.lower_txs_cube_array = true,
.lower_invalid_implicit_lod = true,
.lower_tg4_offsets = true,
.lower_to_fragment_fetch_amd = sscreen->info.gfx_level < GFX11,
.lower_1d = sscreen->info.gfx_level == GFX9,
.optimize_txd = true,
};
NIR_PASS(_, nir, nir_lower_tex, &lower_tex_options);
const struct nir_lower_image_options lower_image_options = {
.lower_cube_size = true,
.lower_to_fragment_mask_load_amd = sscreen->info.gfx_level < GFX11 &&
!(sscreen->debug_flags & DBG(NO_FMASK)),
};
NIR_PASS(_, nir, nir_lower_image, &lower_image_options);
NIR_PASS(_, nir, ac_nir_lower_sin_cos);
/* Lower load constants to scalar and then clean up the mess */
NIR_PASS(_, nir, nir_lower_load_const_to_scalar);
NIR_PASS(_, nir, nir_lower_var_copies);
NIR_PASS(_, nir, nir_opt_intrinsics);