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intel/dev: Support new topology type with SIMD16 EUs
Xe KMD will now report the different topology mask types based on the
type of the EU of running platform.
With this we don't need to divide the EU count by 2 in intel_perf.
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Signed-off-by: José Roberto de Souza <jose.souza@intel.com>
(cherry picked from commit 132c5cdeb9)
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/30522>
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3 changed files with 2 additions and 9 deletions
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@ -824,7 +824,7 @@
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"description": "intel/dev: Support new topology type with SIMD16 EUs",
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"nominated": false,
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"nomination_type": 3,
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"resolution": 4,
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"resolution": 1,
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"main_sha": null,
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"because_sha": null,
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"notes": null
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@ -296,6 +296,7 @@ xe_query_topology(int fd, struct intel_device_info *devinfo)
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geo_dss_num_bytes = topology->num_bytes;
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break;
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case DRM_XE_TOPO_EU_PER_DSS:
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case DRM_XE_TOPO_SIMD16_EU_PER_DSS:
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eu_per_dss_mask = (uint32_t *)topology->mask;
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break;
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}
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@ -342,14 +342,6 @@ compute_topology_builtins(struct intel_perf_config *perf)
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perf->sys_vars.n_eu_sub_slices = intel_device_info_subslice_total(devinfo);
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perf->sys_vars.n_eus = intel_device_info_eu_total(devinfo);
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/* Xe2+ OA equations expects actual EU count but KMD returns legacy EU
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* count.
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*/
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if (devinfo->verx10 >= 200) {
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perf->sys_vars.n_eu_slice0123 /= 2;
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perf->sys_vars.n_eus /= 2;
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}
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/* The subslice mask builtin contains bits for all slices. Prior to Gfx11
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* it had groups of 3bits for each slice, on Gfx11 and above it's 8bits for
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* each slice.
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