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intel/dev: Support new topology type with SIMD16 EUs

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Xe KMD will now report the different topology mask types based on the
type of the EU of running platform.
With this we don't need to divide the EU count by 2 in intel_perf.

Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Signed-off-by: José Roberto de Souza <jose.souza@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/30127>
This commit is contained in:
José Roberto de Souza 2024-07-11 08:32:55 -07:00
parent 3da911b092
commit 132c5cdeb9
2 changed files with 1 additions and 8 deletions
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1
src/intel/dev/xe/intel_device_info.c
View file

@ -296,6 +296,7 @@ xe_query_topology(int fd, struct intel_device_info *devinfo)
geo_dss_num_bytes = topology->num_bytes;
break;
case DRM_XE_TOPO_EU_PER_DSS:
case DRM_XE_TOPO_SIMD16_EU_PER_DSS:
eu_per_dss_mask = (uint32_t *)topology->mask;
break;
}

8
src/intel/perf/intel_perf.c
View file

@ -342,14 +342,6 @@ compute_topology_builtins(struct intel_perf_config *perf)
perf->sys_vars.n_eu_sub_slices = intel_device_info_subslice_total(devinfo);
perf->sys_vars.n_eus = intel_device_info_eu_total(devinfo);
/* Xe2+ OA equations expects actual EU count but KMD returns legacy EU
* count.
*/
if (devinfo->verx10 >= 200) {
perf->sys_vars.n_eu_slice0123 /= 2;
perf->sys_vars.n_eus /= 2;
}
/* The subslice mask builtin contains bits for all slices. Prior to Gfx11
* it had groups of 3bits for each slice, on Gfx11 and above it's 8bits for
* each slice.