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intel/fs/xe2+: Enable new format of barycentrics in PS payload.

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The X and Y barycentric vectors are no longer interleaved in SIMD8
chunks (yay), so this is mostly a matter of disabling the
lower_barycentrics() pass and switching to a simpler implementation of
fetch_barycentric_reg() that simply calls fetch_payload_reg() instead
of the SIMD8 shuffling we had to do in previous generations.

Reviewed-by: Caio Oliveira <caio.oliveira@intel.com>
Reviewed-by: Jordan Justen <jordan.l.justen@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/26606>
This commit is contained in:
Francisco Jerez 2023-12-01 21:51:19 -08:00 • committed by Caio Oliveira
parent 49a867f67e
commit d622e19f00
1 changed files with 4 additions and 1 deletions
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5
src/intel/compiler/brw_fs.cpp
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@ -5500,7 +5500,8 @@ fs_visitor::lower_simd_width()
bool
fs_visitor::lower_barycentrics()
{
const bool has_interleaved_layout = devinfo->has_pln || devinfo->ver >= 7;
const bool has_interleaved_layout = devinfo->has_pln ||
(devinfo->ver >= 7 && devinfo->ver < 20);
bool progress = false;
if (stage != MESA_SHADER_FRAGMENT || !has_interleaved_layout)
@ -8367,6 +8368,8 @@ namespace brw {
{
if (!regs[0])
return fs_reg();
else if (bld.shader->devinfo->ver >= 20)
return fetch_payload_reg(bld, regs, BRW_REGISTER_TYPE_F, 2);
const fs_reg tmp = bld.vgrf(BRW_REGISTER_TYPE_F, 2);
const brw::fs_builder hbld = bld.exec_all().group(8, 0);