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radeonsi/gfx11: adjust ACCUM_* fields for tessellation

Browse source 
based on PAL

Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/21041>
This commit is contained in:
Marek Olšák 2023-01-24 00:05:11 -05:00 • committed by Marge Bot
parent 0b4b309fc6
commit d5ff270e0b
1 changed files with 3 additions and 3 deletions
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6
src/gallium/drivers/radeonsi/si_state.c
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@ -5732,9 +5732,9 @@ void si_init_cs_preamble_state(struct si_context *sctx, bool uses_reg_shadowing)
if (sctx->gfx_level >= GFX11) {
/* ACCUM fields changed their meaning. */
vgt_tess_distribution = S_028B50_ACCUM_ISOLINE(255) |
S_028B50_ACCUM_TRI(255) |
S_028B50_ACCUM_QUAD(255) |
vgt_tess_distribution = S_028B50_ACCUM_ISOLINE(128) |
S_028B50_ACCUM_TRI(128) |
S_028B50_ACCUM_QUAD(128) |
S_028B50_DONUT_SPLIT_GFX9(24) |
S_028B50_TRAP_SPLIT(6);
} else if (sctx->gfx_level >= GFX9) {