From d5ff270e0bf338a34b16cc65bd9999eda8e8a3ed Mon Sep 17 00:00:00 2001 From: =?UTF-8?q?Marek=20Ol=C5=A1=C3=A1k?= Date: Tue, 24 Jan 2023 00:05:11 -0500 Subject: [PATCH] radeonsi/gfx11: adjust ACCUM_* fields for tessellation based on PAL Reviewed-by: Pierre-Eric Pelloux-Prayer Part-of: --- src/gallium/drivers/radeonsi/si_state.c | 6 +++--- 1 file changed, 3 insertions(+), 3 deletions(-) diff --git a/src/gallium/drivers/radeonsi/si_state.c b/src/gallium/drivers/radeonsi/si_state.c index 7f300109806..f7d44991051 100644 --- a/src/gallium/drivers/radeonsi/si_state.c +++ b/src/gallium/drivers/radeonsi/si_state.c @@ -5732,9 +5732,9 @@ void si_init_cs_preamble_state(struct si_context *sctx, bool uses_reg_shadowing) if (sctx->gfx_level >= GFX11) { /* ACCUM fields changed their meaning. */ - vgt_tess_distribution = S_028B50_ACCUM_ISOLINE(255) | - S_028B50_ACCUM_TRI(255) | - S_028B50_ACCUM_QUAD(255) | + vgt_tess_distribution = S_028B50_ACCUM_ISOLINE(128) | + S_028B50_ACCUM_TRI(128) | + S_028B50_ACCUM_QUAD(128) | S_028B50_DONUT_SPLIT_GFX9(24) | S_028B50_TRAP_SPLIT(6); } else if (sctx->gfx_level >= GFX9) {