nv50/nir: align tlsspace to 0x10

nvc0 aligns to 0x10 in setting up its rogram header, but nv50 TLS
allocation expects the incoming value to be aligned already (like TGSI
always did).  Avoids regression in
KHR-GL33.shaders.arrays.declaration.dynamic_expression_array_access_* with
the nir backend.

Reviewed-by: Emma Anholt <emma@anholt.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/15949>
This commit is contained in:
Karol Herbst 2022-04-25 22:21:16 +02:00 committed by Marge Bot
parent c228cb3889
commit d1ff453a0d

View file

@ -1301,7 +1301,7 @@ Converter::storeTo(nir_intrinsic_instr *insn, DataFile file, operation op,
bool bool
Converter::parseNIR() Converter::parseNIR()
{ {
info_out->bin.tlsSpace = nir->scratch_size; info_out->bin.tlsSpace = ALIGN(nir->scratch_size, 0x10);
info_out->io.clipDistances = nir->info.clip_distance_array_size; info_out->io.clipDistances = nir->info.clip_distance_array_size;
info_out->io.cullDistances = nir->info.cull_distance_array_size; info_out->io.cullDistances = nir->info.cull_distance_array_size;
info_out->io.layer_viewport_relative = nir->info.layer_viewport_relative; info_out->io.layer_viewport_relative = nir->info.layer_viewport_relative;