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aco/ra: disallow vcc definitions for pseudo scalar trans instrs
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Foz-DB GFX1201:
Totals from 30 (0.04% of 79600) affected shaders:
Instrs: 58843 -> 58820 (-0.04%); split: -0.10%, +0.06%
CodeSize: 302228 -> 301944 (-0.09%); split: -0.13%, +0.04%
Latency: 204566 -> 204432 (-0.07%); split: -0.09%, +0.02%
InvThroughput: 136918 -> 136919 (+0.00%); split: -0.00%, +0.00%
SClause: 1241 -> 1249 (+0.64%); split: -0.56%, +1.21%

Reviewed-by: Rhys Perry <pendingchaos02@gmail.com>

Cc: mesa-stable
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/34006>
This commit is contained in:
Georg Lehmann 2025-03-11 15:44:05 +01:00 • committed by Marge Bot
parent b386659588
commit d1dca26941
1 changed files with 14 additions and 0 deletions
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14
src/amd/compiler/aco_register_allocation.cpp
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@ -263,6 +263,12 @@ struct DefInfo {
if (imageGather4D16Bug)
bounds.size -= MAX2(rc.bytes() / 4 - ctx.num_linear_vgprs, 0);
} else if (instr_info.classes[(int)instr->opcode] == instr_class::valu_pseudo_scalar_trans) {
/* RDNA4 ISA doc, 7.10. Pseudo-scalar Transcendental ALU ops:
* - VCC may not be used as a destination
*/
if (bounds.contains(vcc))
bounds.size = vcc - bounds.lo();
}
if (!data_stride)
@ -1422,6 +1428,14 @@ get_reg_specified(ra_ctx& ctx, const RegisterFile& reg_file, RegClass rc,
if (!info.bounds.contains(reg_win) && !is_vcc && !is_m0)
return false;
if (instr_info.classes[(int)instr->opcode] == instr_class::valu_pseudo_scalar_trans) {
/* RDNA4 ISA doc, 7.10. Pseudo-scalar Transcendental ALU ops:
* - VCC may not be used as a destination
*/
if (vcc_win.contains(reg_win))
return false;
}
if (reg_file.test(reg, info.rc.bytes()))
return false;