From d1dca2694153a4e549fc1713716ffb4545f708e0 Mon Sep 17 00:00:00 2001 From: Georg Lehmann Date: Tue, 11 Mar 2025 15:44:05 +0100 Subject: [PATCH] aco/ra: disallow vcc definitions for pseudo scalar trans instrs Foz-DB GFX1201: Totals from 30 (0.04% of 79600) affected shaders: Instrs: 58843 -> 58820 (-0.04%); split: -0.10%, +0.06% CodeSize: 302228 -> 301944 (-0.09%); split: -0.13%, +0.04% Latency: 204566 -> 204432 (-0.07%); split: -0.09%, +0.02% InvThroughput: 136918 -> 136919 (+0.00%); split: -0.00%, +0.00% SClause: 1241 -> 1249 (+0.64%); split: -0.56%, +1.21% Reviewed-by: Rhys Perry Cc: mesa-stable Part-of: --- src/amd/compiler/aco_register_allocation.cpp | 14 ++++++++++++++ 1 file changed, 14 insertions(+) diff --git a/src/amd/compiler/aco_register_allocation.cpp b/src/amd/compiler/aco_register_allocation.cpp index d361f64705a..e10163bb470 100644 --- a/src/amd/compiler/aco_register_allocation.cpp +++ b/src/amd/compiler/aco_register_allocation.cpp @@ -263,6 +263,12 @@ struct DefInfo { if (imageGather4D16Bug) bounds.size -= MAX2(rc.bytes() / 4 - ctx.num_linear_vgprs, 0); + } else if (instr_info.classes[(int)instr->opcode] == instr_class::valu_pseudo_scalar_trans) { + /* RDNA4 ISA doc, 7.10. Pseudo-scalar Transcendental ALU ops: + * - VCC may not be used as a destination + */ + if (bounds.contains(vcc)) + bounds.size = vcc - bounds.lo(); } if (!data_stride) @@ -1422,6 +1428,14 @@ get_reg_specified(ra_ctx& ctx, const RegisterFile& reg_file, RegClass rc, if (!info.bounds.contains(reg_win) && !is_vcc && !is_m0) return false; + if (instr_info.classes[(int)instr->opcode] == instr_class::valu_pseudo_scalar_trans) { + /* RDNA4 ISA doc, 7.10. Pseudo-scalar Transcendental ALU ops: + * - VCC may not be used as a destination + */ + if (vcc_win.contains(reg_win)) + return false; + } + if (reg_file.test(reg, info.rc.bytes())) return false;