fdo-mirrors/mesa
1
0
Fork 0
mirror of https://gitlab.freedesktop.org/mesa/mesa.git synced 2026-05-08 09:08:10 +02:00
Code Issues Projects Releases Packages Wiki Activity Actions 1

radv: Always store stride in the vbo descriptor.

Browse source 
So we can use it in the DGC shader.

Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/17269>
This commit is contained in:
Bas Nieuwenhuizen 2022-02-07 02:04:56 +01:00 • committed by Marge Bot
parent bce3af2cb3
commit cca680bab1
2 changed files with 28 additions and 11 deletions
Show stats Download patch file Download diff file Expand all files Collapse all files

36
src/amd/vulkan/radv_cmd_buffer.c
View file

@ -3426,7 +3426,8 @@ static const uint32_t data_format_dst_sel[] = {
void
radv_write_vertex_descriptors(const struct radv_cmd_buffer *cmd_buffer,
const struct radv_graphics_pipeline *pipeline, void *vb_ptr)
const struct radv_graphics_pipeline *pipeline,
bool full_null_descriptors, void *vb_ptr)
{
struct radv_shader *vs_shader = radv_get_shader(&pipeline->base, MESA_SHADER_VERTEX);
enum amd_gfx_level chip = cmd_buffer->device->physical_device->rad_info.gfx_level;
@ -3467,8 +3468,20 @@ radv_write_vertex_descriptors(const struct radv_cmd_buffer *cmd_buffer,
S_008F0C_DATA_FORMAT(V_008F0C_BUF_DATA_FORMAT_32);
}
if (pipeline->uses_dynamic_stride) {
stride = cmd_buffer->vertex_bindings[binding].stride;
} else {
stride = pipeline->binding_stride[binding];
}
if (!buffer) {
if (vs_state) {
if (full_null_descriptors) {
/* Put all the info in for the DGC generation shader in case the VBO gets overridden. */
desc[0] = 0;
desc[1] = S_008F04_STRIDE(stride);
desc[2] = 0;
desc[3] = rsrc_word3;
} else if (vs_state) {
/* Stride needs to be non-zero on GFX9, or else bounds checking is disabled. We need
* to include the format/word3 so that the alpha channel is 1 for formats without an
* alpha channel.
@ -3480,6 +3493,7 @@ radv_write_vertex_descriptors(const struct radv_cmd_buffer *cmd_buffer,
} else {
memset(desc, 0, 4 * 4);
}
continue;
}
@ -3496,12 +3510,6 @@ radv_write_vertex_descriptors(const struct radv_cmd_buffer *cmd_buffer,
num_records = vk_buffer_range(&buffer->vk, offset, VK_WHOLE_SIZE);
}
if (pipeline->uses_dynamic_stride) {
stride = cmd_buffer->vertex_bindings[binding].stride;
} else {
stride = pipeline->binding_stride[binding];
}
if (pipeline->use_per_attribute_vb_descs) {
uint32_t attrib_end =
vs_state ? vs_state->offsets[i] + vs_state->format_sizes[i] : pipeline->attrib_ends[i];
@ -3529,7 +3537,14 @@ radv_write_vertex_descriptors(const struct radv_cmd_buffer *cmd_buffer,
* num_records and stride are zero. This doesn't seem necessary on GFX8, GFX10 and
* GFX10.3 but it doesn't hurt.
*/
if (vs_state) {
if (full_null_descriptors) {
/* Put all the info in for the DGC generation shader in case the VBO gets overridden.
*/
desc[0] = 0;
desc[1] = S_008F04_STRIDE(stride);
desc[2] = 0;
desc[3] = rsrc_word3;
} else if (vs_state) {
desc[0] = 0;
desc[1] = S_008F04_STRIDE(16);
desc[2] = 0;
@ -3537,6 +3552,7 @@ radv_write_vertex_descriptors(const struct radv_cmd_buffer *cmd_buffer,
} else {
memset(desc, 0, 16);
}
continue;
}
} else {
@ -3578,7 +3594,7 @@ radv_flush_vertex_descriptors(struct radv_cmd_buffer *cmd_buffer, bool pipeline_
&vb_ptr))
return;
radv_write_vertex_descriptors(cmd_buffer, pipeline, vb_ptr);
radv_write_vertex_descriptors(cmd_buffer, pipeline, false, vb_ptr);
va = radv_buffer_get_va(cmd_buffer->upload.upload_bo);
va += vb_offset;

3
src/amd/vulkan/radv_private.h
View file

@ -1692,7 +1692,8 @@ void radv_cmd_buffer_restore_subpass(struct radv_cmd_buffer *cmd_buffer,
bool radv_cmd_buffer_upload_data(struct radv_cmd_buffer *cmd_buffer, unsigned size,
const void *data, unsigned *out_offset);
void radv_write_vertex_descriptors(const struct radv_cmd_buffer *cmd_buffer,
const struct radv_graphics_pipeline *pipeline, void *vb_ptr);
const struct radv_graphics_pipeline *pipeline,
bool full_null_descriptors, void *vb_ptr);
void radv_cmd_buffer_clear_subpass(struct radv_cmd_buffer *cmd_buffer);
void radv_cmd_buffer_resolve_subpass(struct radv_cmd_buffer *cmd_buffer);