mirror of
https://gitlab.freedesktop.org/mesa/mesa.git
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r300: Reorder the vertprog code to the ARB specification.
This commit is contained in:
Oliver McFadden
parent
cbfe29cdee
commit
cc85860ccb
1 changed files with 260 additions and 177 deletions
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@ -416,49 +416,68 @@ static GLboolean valid_dst(struct r300_vertex_program *vp,
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return GL_TRUE;
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}
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static void t_opcode_pow(struct r300_vertex_program *vp,
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/*
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* Instruction Inputs Output Description
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* ----------- ------ ------ --------------------------------
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* ABS v v absolute value
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* ADD v,v v add
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* ARL s a address register load
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* DP3 v,v ssss 3-component dot product
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* DP4 v,v ssss 4-component dot product
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* DPH v,v ssss homogeneous dot product
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* DST v,v v distance vector
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* EX2 s ssss exponential base 2
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* EXP s v exponential base 2 (approximate)
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* FLR v v floor
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* FRC v v fraction
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* LG2 s ssss logarithm base 2
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* LIT v v compute light coefficients
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* LOG s v logarithm base 2 (approximate)
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* MAD v,v,v v multiply and add
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* MAX v,v v maximum
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* MIN v,v v minimum
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* MOV v v move
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* MUL v,v v multiply
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* POW s,s ssss exponentiate
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* RCP s ssss reciprocal
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* RSQ s ssss reciprocal square root
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* SGE v,v v set on greater than or equal
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* SLT v,v v set on less than
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* SUB v,v v subtract
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* SWZ v v extended swizzle
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* XPD v,v v cross product
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*
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* Table X.5: Summary of vertex program instructions. "v" indicates a
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* floating-point vector input or output, "s" indicates a floating-point
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* scalar input, "ssss" indicates a scalar output replicated across a
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* 4-component result vector, and "a" indicates a single address register
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* component.
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*/
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static void t_opcode_abs(struct r300_vertex_program *vp,
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struct prog_instruction *vpi,
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struct r300_vertprog_instruction *o_inst,
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struct prog_src_register src[3])
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{
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//MAX RESULT 1.X Y Z W PARAM 0{} {X Y Z W} PARAM 0{X Y Z W } {X Y Z W} neg Xneg Yneg Zneg W
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o_inst->opcode =
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MAKE_VSF_OP(R300_VPI_OUT_OP_POW, t_dst_index(vp, &vpi->DstReg),
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MAKE_VSF_OP(R300_VPI_OUT_OP_MAX, t_dst_index(vp, &vpi->DstReg),
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t_dst_mask(vpi->DstReg.WriteMask),
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t_dst_class(vpi->DstReg.File));
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o_inst->src[0] = t_src_scalar(vp, &src[0]);
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o_inst->src[1] = ZERO_SRC_0;
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o_inst->src[2] = t_src_scalar(vp, &src[1]);
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}
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static void t_opcode_mov(struct r300_vertex_program *vp,
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struct prog_instruction *vpi,
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struct r300_vertprog_instruction *o_inst,
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struct prog_src_register src[3])
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{
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//ADD RESULT 1.X Y Z W PARAM 0{} {X Y Z W} PARAM 0{} {ZERO ZERO ZERO ZERO}
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#if 1
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o_inst->opcode =
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MAKE_VSF_OP(R300_VPI_OUT_OP_ADD, t_dst_index(vp, &vpi->DstReg),
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t_dst_mask(vpi->DstReg.WriteMask),
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t_dst_class(vpi->DstReg.File));
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o_inst->src[0] = t_src(vp, &src[0]);
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o_inst->src[1] = ZERO_SRC_0;
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o_inst->src[2] = ZERO_SRC_0;
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#else
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hw_op =
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(src[0].File ==
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PROGRAM_TEMPORARY) ? R300_VPI_OUT_OP_MAD_2 :
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R300_VPI_OUT_OP_MAD;
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o_inst->opcode =
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MAKE_VSF_OP(hw_op, t_dst_index(vp, &vpi->DstReg),
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t_dst_mask(vpi->DstReg.WriteMask),
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t_dst_class(vpi->DstReg.File));
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o_inst->src[0] = t_src(vp, &src[0]);
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o_inst->src[1] = ONE_SRC_0;
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o_inst->src[2] = ZERO_SRC_0;
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#endif
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o_inst->src[1] =
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MAKE_VSF_SOURCE(t_src_index(vp, &src[0]),
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t_swizzle(GET_SWZ(src[0].Swizzle, 0)),
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t_swizzle(GET_SWZ(src[0].Swizzle, 1)),
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t_swizzle(GET_SWZ(src[0].Swizzle, 2)),
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t_swizzle(GET_SWZ(src[0].Swizzle, 3)),
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t_src_class(src[0].File),
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(!src[0].
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NegateBase) ? VSF_FLAG_ALL : VSF_FLAG_NONE) |
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(src[0].RelAddr << 4);
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o_inst->src[2] = 0;
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}
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static void t_opcode_add(struct r300_vertex_program *vp,
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@ -493,51 +512,7 @@ static void t_opcode_add(struct r300_vertex_program *vp,
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#endif
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}
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static void t_opcode_mad(struct r300_vertex_program *vp,
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struct prog_instruction *vpi,
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struct r300_vertprog_instruction *o_inst,
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struct prog_src_register src[3])
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{
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unsigned long hw_op;
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hw_op = (src[0].File == PROGRAM_TEMPORARY
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&& src[1].File == PROGRAM_TEMPORARY
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&& src[2].File ==
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PROGRAM_TEMPORARY) ? R300_VPI_OUT_OP_MAD_2 :
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R300_VPI_OUT_OP_MAD;
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o_inst->opcode =
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MAKE_VSF_OP(hw_op, t_dst_index(vp, &vpi->DstReg),
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t_dst_mask(vpi->DstReg.WriteMask),
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t_dst_class(vpi->DstReg.File));
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o_inst->src[0] = t_src(vp, &src[0]);
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o_inst->src[1] = t_src(vp, &src[1]);
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o_inst->src[2] = t_src(vp, &src[2]);
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}
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static void t_opcode_mul(struct r300_vertex_program *vp,
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struct prog_instruction *vpi,
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struct r300_vertprog_instruction *o_inst,
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struct prog_src_register src[3])
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{
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unsigned long hw_op;
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// HW mul can take third arg but appears to have some other limitations.
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hw_op = (src[0].File == PROGRAM_TEMPORARY
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&& src[1].File ==
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PROGRAM_TEMPORARY) ? R300_VPI_OUT_OP_MAD_2 :
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R300_VPI_OUT_OP_MAD;
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o_inst->opcode =
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MAKE_VSF_OP(hw_op, t_dst_index(vp, &vpi->DstReg),
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t_dst_mask(vpi->DstReg.WriteMask),
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t_dst_class(vpi->DstReg.File));
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o_inst->src[0] = t_src(vp, &src[0]);
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o_inst->src[1] = t_src(vp, &src[1]);
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o_inst->src[2] = ZERO_SRC_1;
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}
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/* TODO: ARL */
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static void t_opcode_dp3(struct r300_vertex_program *vp,
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struct prog_instruction *vpi,
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@ -574,84 +549,38 @@ static void t_opcode_dp3(struct r300_vertex_program *vp,
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o_inst->src[2] = ZERO_SRC_1;
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}
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static void t_opcode_sub(struct r300_vertex_program *vp,
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/* TODO: DP4 */
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static void t_opcode_dph(struct r300_vertex_program *vp,
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struct prog_instruction *vpi,
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struct r300_vertprog_instruction *o_inst,
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struct prog_src_register src[3])
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{
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unsigned long hw_op;
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//ADD RESULT 1.X Y Z W TMP 0{} {X Y Z W} PARAM 1{X Y Z W } {X Y Z W} neg Xneg Yneg Zneg W
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#if 1
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hw_op = (src[0].File == PROGRAM_TEMPORARY
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&& src[1].File ==
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PROGRAM_TEMPORARY) ? R300_VPI_OUT_OP_MAD_2 :
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R300_VPI_OUT_OP_MAD;
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//DOT RESULT 1.X Y Z W PARAM 0{} {X Y Z ONE} PARAM 0{} {X Y Z W}
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o_inst->opcode =
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MAKE_VSF_OP(hw_op, t_dst_index(vp, &vpi->DstReg),
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t_dst_mask(vpi->DstReg.WriteMask),
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t_dst_class(vpi->DstReg.File));
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o_inst->src[0] = t_src(vp, &src[0]);
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o_inst->src[1] = ONE_SRC_0;
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o_inst->src[2] =
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MAKE_VSF_SOURCE(t_src_index(vp, &src[1]),
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t_swizzle(GET_SWZ(src[1].Swizzle, 0)),
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t_swizzle(GET_SWZ(src[1].Swizzle, 1)),
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t_swizzle(GET_SWZ(src[1].Swizzle, 2)),
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t_swizzle(GET_SWZ(src[1].Swizzle, 3)),
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t_src_class(src[1].File),
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(!src[1].
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NegateBase) ? VSF_FLAG_ALL : VSF_FLAG_NONE) |
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(src[1].RelAddr << 4);
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#else
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o_inst->opcode =
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MAKE_VSF_OP(R300_VPI_OUT_OP_ADD, t_dst_index(vp, &vpi->DstReg),
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MAKE_VSF_OP(R300_VPI_OUT_OP_DOT, t_dst_index(vp, &vpi->DstReg),
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t_dst_mask(vpi->DstReg.WriteMask),
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t_dst_class(vpi->DstReg.File));
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o_inst->src[0] = t_src(vp, &src[0]);
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o_inst->src[1] =
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MAKE_VSF_SOURCE(t_src_index(vp, &src[1]),
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t_swizzle(GET_SWZ(src[1].Swizzle, 0)),
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t_swizzle(GET_SWZ(src[1].Swizzle, 1)),
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t_swizzle(GET_SWZ(src[1].Swizzle, 2)),
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t_swizzle(GET_SWZ(src[1].Swizzle, 3)),
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t_src_class(src[1].File),
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(!src[1].
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NegateBase) ? VSF_FLAG_ALL : VSF_FLAG_NONE) |
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(src[1].RelAddr << 4);
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o_inst->src[2] = 0;
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#endif
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}
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static void t_opcode_abs(struct r300_vertex_program *vp,
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struct prog_instruction *vpi,
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struct r300_vertprog_instruction *o_inst,
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struct prog_src_register src[3])
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{
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//MAX RESULT 1.X Y Z W PARAM 0{} {X Y Z W} PARAM 0{X Y Z W } {X Y Z W} neg Xneg Yneg Zneg W
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o_inst->opcode =
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MAKE_VSF_OP(R300_VPI_OUT_OP_MAX, t_dst_index(vp, &vpi->DstReg),
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t_dst_mask(vpi->DstReg.WriteMask),
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t_dst_class(vpi->DstReg.File));
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o_inst->src[0] = t_src(vp, &src[0]);
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o_inst->src[1] =
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o_inst->src[0] =
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MAKE_VSF_SOURCE(t_src_index(vp, &src[0]),
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t_swizzle(GET_SWZ(src[0].Swizzle, 0)),
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t_swizzle(GET_SWZ(src[0].Swizzle, 1)),
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t_swizzle(GET_SWZ(src[0].Swizzle, 2)),
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t_swizzle(GET_SWZ(src[0].Swizzle, 3)),
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t_src_class(src[0].File),
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(!src[0].
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NegateBase) ? VSF_FLAG_ALL : VSF_FLAG_NONE) |
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VSF_IN_COMPONENT_ONE, t_src_class(src[0].File),
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src[0].
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NegateBase ? VSF_FLAG_XYZ : VSF_FLAG_NONE) |
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(src[0].RelAddr << 4);
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o_inst->src[2] = 0;
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o_inst->src[1] = t_src(vp, &src[1]);
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o_inst->src[2] = ZERO_SRC_1;
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}
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/* TODO: DST */
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/* TODO: EX2 */
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/* TODO: EXP */
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static void t_opcode_flr(struct r300_vertex_program *vp,
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struct prog_instruction *vpi,
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struct r300_vertprog_instruction *o_inst,
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@ -689,6 +618,8 @@ static void t_opcode_flr(struct r300_vertex_program *vp,
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(*u_temp_i)--;
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}
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/* TODO: FRC */
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static void t_opcode_lg2(struct r300_vertex_program *vp,
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struct prog_instruction *vpi,
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struct r300_vertprog_instruction *o_inst,
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@ -756,30 +687,165 @@ static void t_opcode_lit(struct r300_vertex_program *vp,
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RelAddr << 4);
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}
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static void t_opcode_dph(struct r300_vertex_program *vp,
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/* TODO: LOG */
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static void t_opcode_mad(struct r300_vertex_program *vp,
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struct prog_instruction *vpi,
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struct r300_vertprog_instruction *o_inst,
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struct prog_src_register src[3])
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{
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//DOT RESULT 1.X Y Z W PARAM 0{} {X Y Z ONE} PARAM 0{} {X Y Z W}
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unsigned long hw_op;
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hw_op = (src[0].File == PROGRAM_TEMPORARY
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&& src[1].File == PROGRAM_TEMPORARY
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&& src[2].File ==
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PROGRAM_TEMPORARY) ? R300_VPI_OUT_OP_MAD_2 :
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R300_VPI_OUT_OP_MAD;
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o_inst->opcode =
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MAKE_VSF_OP(R300_VPI_OUT_OP_DOT, t_dst_index(vp, &vpi->DstReg),
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MAKE_VSF_OP(hw_op, t_dst_index(vp, &vpi->DstReg),
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t_dst_mask(vpi->DstReg.WriteMask),
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t_dst_class(vpi->DstReg.File));
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o_inst->src[0] = t_src(vp, &src[0]);
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o_inst->src[1] = t_src(vp, &src[1]);
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o_inst->src[2] = t_src(vp, &src[2]);
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}
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/* TODO: MAX */
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/* TODO: MIN */
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static void t_opcode_mov(struct r300_vertex_program *vp,
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struct prog_instruction *vpi,
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struct r300_vertprog_instruction *o_inst,
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struct prog_src_register src[3])
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{
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//ADD RESULT 1.X Y Z W PARAM 0{} {X Y Z W} PARAM 0{} {ZERO ZERO ZERO ZERO}
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#if 1
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o_inst->opcode =
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MAKE_VSF_OP(R300_VPI_OUT_OP_ADD, t_dst_index(vp, &vpi->DstReg),
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t_dst_mask(vpi->DstReg.WriteMask),
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t_dst_class(vpi->DstReg.File));
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o_inst->src[0] = t_src(vp, &src[0]);
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o_inst->src[1] = ZERO_SRC_0;
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o_inst->src[2] = ZERO_SRC_0;
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#else
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hw_op =
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(src[0].File ==
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PROGRAM_TEMPORARY) ? R300_VPI_OUT_OP_MAD_2 :
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R300_VPI_OUT_OP_MAD;
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o_inst->opcode =
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MAKE_VSF_OP(hw_op, t_dst_index(vp, &vpi->DstReg),
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t_dst_mask(vpi->DstReg.WriteMask),
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t_dst_class(vpi->DstReg.File));
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o_inst->src[0] = t_src(vp, &src[0]);
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o_inst->src[1] = ONE_SRC_0;
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o_inst->src[2] = ZERO_SRC_0;
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#endif
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}
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static void t_opcode_mul(struct r300_vertex_program *vp,
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struct prog_instruction *vpi,
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struct r300_vertprog_instruction *o_inst,
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struct prog_src_register src[3])
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{
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unsigned long hw_op;
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// HW mul can take third arg but appears to have some other limitations.
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hw_op = (src[0].File == PROGRAM_TEMPORARY
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&& src[1].File ==
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PROGRAM_TEMPORARY) ? R300_VPI_OUT_OP_MAD_2 :
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R300_VPI_OUT_OP_MAD;
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o_inst->opcode =
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MAKE_VSF_OP(hw_op, t_dst_index(vp, &vpi->DstReg),
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t_dst_mask(vpi->DstReg.WriteMask),
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t_dst_class(vpi->DstReg.File));
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o_inst->src[0] = t_src(vp, &src[0]);
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o_inst->src[1] = t_src(vp, &src[1]);
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o_inst->src[2] = ZERO_SRC_1;
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}
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static void t_opcode_pow(struct r300_vertex_program *vp,
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struct prog_instruction *vpi,
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struct r300_vertprog_instruction *o_inst,
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struct prog_src_register src[3])
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{
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o_inst->opcode =
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MAKE_VSF_OP(R300_VPI_OUT_OP_POW, t_dst_index(vp, &vpi->DstReg),
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t_dst_mask(vpi->DstReg.WriteMask),
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t_dst_class(vpi->DstReg.File));
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o_inst->src[0] = t_src_scalar(vp, &src[0]);
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o_inst->src[1] = ZERO_SRC_0;
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o_inst->src[2] = t_src_scalar(vp, &src[1]);
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}
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/* TODO: RCP */
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/* TODO: RSQ */
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/* TODO: SGE */
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/* TODO: SLT */
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static void t_opcode_sub(struct r300_vertex_program *vp,
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struct prog_instruction *vpi,
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struct r300_vertprog_instruction *o_inst,
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struct prog_src_register src[3])
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{
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unsigned long hw_op;
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//ADD RESULT 1.X Y Z W TMP 0{} {X Y Z W} PARAM 1{X Y Z W } {X Y Z W} neg Xneg Yneg Zneg W
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#if 1
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hw_op = (src[0].File == PROGRAM_TEMPORARY
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&& src[1].File ==
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PROGRAM_TEMPORARY) ? R300_VPI_OUT_OP_MAD_2 :
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R300_VPI_OUT_OP_MAD;
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||||
|
||||
o_inst->opcode =
|
||||
MAKE_VSF_OP(hw_op, t_dst_index(vp, &vpi->DstReg),
|
||||
t_dst_mask(vpi->DstReg.WriteMask),
|
||||
t_dst_class(vpi->DstReg.File));
|
||||
o_inst->src[0] = t_src(vp, &src[0]);
|
||||
o_inst->src[1] = ONE_SRC_0;
|
||||
o_inst->src[2] =
|
||||
MAKE_VSF_SOURCE(t_src_index(vp, &src[1]),
|
||||
t_swizzle(GET_SWZ(src[1].Swizzle, 0)),
|
||||
t_swizzle(GET_SWZ(src[1].Swizzle, 1)),
|
||||
t_swizzle(GET_SWZ(src[1].Swizzle, 2)),
|
||||
t_swizzle(GET_SWZ(src[1].Swizzle, 3)),
|
||||
t_src_class(src[1].File),
|
||||
(!src[1].
|
||||
NegateBase) ? VSF_FLAG_ALL : VSF_FLAG_NONE) |
|
||||
(src[1].RelAddr << 4);
|
||||
#else
|
||||
o_inst->opcode =
|
||||
MAKE_VSF_OP(R300_VPI_OUT_OP_ADD, t_dst_index(vp, &vpi->DstReg),
|
||||
t_dst_mask(vpi->DstReg.WriteMask),
|
||||
t_dst_class(vpi->DstReg.File));
|
||||
|
||||
o_inst->src[0] =
|
||||
MAKE_VSF_SOURCE(t_src_index(vp, &src[0]),
|
||||
t_swizzle(GET_SWZ(src[0].Swizzle, 0)),
|
||||
t_swizzle(GET_SWZ(src[0].Swizzle, 1)),
|
||||
t_swizzle(GET_SWZ(src[0].Swizzle, 2)),
|
||||
VSF_IN_COMPONENT_ONE, t_src_class(src[0].File),
|
||||
src[0].
|
||||
NegateBase ? VSF_FLAG_XYZ : VSF_FLAG_NONE) |
|
||||
(src[0].RelAddr << 4);
|
||||
o_inst->src[1] = t_src(vp, &src[1]);
|
||||
o_inst->src[2] = ZERO_SRC_1;
|
||||
o_inst->src[0] = t_src(vp, &src[0]);
|
||||
o_inst->src[1] =
|
||||
MAKE_VSF_SOURCE(t_src_index(vp, &src[1]),
|
||||
t_swizzle(GET_SWZ(src[1].Swizzle, 0)),
|
||||
t_swizzle(GET_SWZ(src[1].Swizzle, 1)),
|
||||
t_swizzle(GET_SWZ(src[1].Swizzle, 2)),
|
||||
t_swizzle(GET_SWZ(src[1].Swizzle, 3)),
|
||||
t_src_class(src[1].File),
|
||||
(!src[1].
|
||||
NegateBase) ? VSF_FLAG_ALL : VSF_FLAG_NONE) |
|
||||
(src[1].RelAddr << 4);
|
||||
o_inst->src[2] = 0;
|
||||
#endif
|
||||
}
|
||||
|
||||
/* TODO: SWZ */
|
||||
|
||||
static void t_opcode_xpd(struct r300_vertex_program *vp,
|
||||
struct prog_instruction *vpi,
|
||||
struct r300_vertprog_instruction *o_inst,
|
||||
|
|
@ -1064,56 +1130,73 @@ static void r300TranslateVertexShader(struct r300_vertex_program *vp,
|
|||
}
|
||||
|
||||
switch (vpi->Opcode) {
|
||||
case OPCODE_POW:
|
||||
t_opcode_pow(vp, vpi, o_inst, src);
|
||||
break;
|
||||
case OPCODE_MOV:
|
||||
t_opcode_mov(vp, vpi, o_inst, src);
|
||||
break;
|
||||
case OPCODE_SWZ:
|
||||
t_opcode_mov(vp, vpi, o_inst, src);
|
||||
case OPCODE_ABS:
|
||||
t_opcode_abs(vp, vpi, o_inst, src);
|
||||
break;
|
||||
case OPCODE_ADD:
|
||||
t_opcode_add(vp, vpi, o_inst, src);
|
||||
break;
|
||||
case OPCODE_MAD:
|
||||
t_opcode_mad(vp, vpi, o_inst, src);
|
||||
break;
|
||||
case OPCODE_MUL:
|
||||
t_opcode_mul(vp, vpi, o_inst, src);
|
||||
break;
|
||||
/* TODO: ARL */
|
||||
case OPCODE_DP3:
|
||||
t_opcode_dp3(vp, vpi, o_inst, src);
|
||||
break;
|
||||
case OPCODE_SUB:
|
||||
t_opcode_sub(vp, vpi, o_inst, src);
|
||||
break;
|
||||
case OPCODE_ABS:
|
||||
t_opcode_abs(vp, vpi, o_inst, src);
|
||||
/* TODO: DP4 */
|
||||
case OPCODE_DPH:
|
||||
t_opcode_dph(vp, vpi, o_inst, src);
|
||||
break;
|
||||
/* TODO: DST */
|
||||
/* TODO: EX2 */
|
||||
/* TODO: EXP */
|
||||
case OPCODE_FLR:
|
||||
/* FIXME */
|
||||
t_opcode_flr(vp, vpi, o_inst, src, &u_temp_i);
|
||||
break;
|
||||
/* TODO: FRC */
|
||||
case OPCODE_LG2:
|
||||
t_opcode_lg2(vp, vpi, o_inst, src);
|
||||
break;
|
||||
case OPCODE_LIT:
|
||||
t_opcode_lit(vp, vpi, o_inst, src);
|
||||
break;
|
||||
case OPCODE_DPH:
|
||||
t_opcode_dph(vp, vpi, o_inst, src);
|
||||
/* TODO: LOG */
|
||||
case OPCODE_MAD:
|
||||
t_opcode_mad(vp, vpi, o_inst, src);
|
||||
break;
|
||||
/* TODO: MAX */
|
||||
/* TODO: MIN */
|
||||
case OPCODE_MOV:
|
||||
t_opcode_mov(vp, vpi, o_inst, src);
|
||||
break;
|
||||
case OPCODE_MUL:
|
||||
t_opcode_mul(vp, vpi, o_inst, src);
|
||||
break;
|
||||
case OPCODE_POW:
|
||||
t_opcode_pow(vp, vpi, o_inst, src);
|
||||
break;
|
||||
/* TODO: RCP */
|
||||
/* TODO: RSQ */
|
||||
/* TODO: SGE */
|
||||
/* TODO: SLT */
|
||||
case OPCODE_SUB:
|
||||
t_opcode_sub(vp, vpi, o_inst, src);
|
||||
break;
|
||||
case OPCODE_SWZ:
|
||||
t_opcode_mov(vp, vpi, o_inst, src);
|
||||
break;
|
||||
/* TODO: SWZ */
|
||||
case OPCODE_XPD:
|
||||
/* FIXME */
|
||||
t_opcode_xpd(vp, vpi, o_inst, src, &u_temp_i);
|
||||
break;
|
||||
|
||||
case OPCODE_RCC:
|
||||
t_opcode_rcc(vp, vpi, o_inst, src);
|
||||
break;
|
||||
|
||||
case OPCODE_END:
|
||||
/* empty */
|
||||
break;
|
||||
|
||||
default:
|
||||
t_opcode_default(vp, vpi, o_inst, src,
|
||||
num_operands, are_srcs_scalar);
|
||||
|
|
|
|||
Loading…
Add table
Reference in a new issue