radv/amdgpu: fix adding continue preambles and postambles BOs to the list

Previously, continue preambles and postambles were added directly to
the CS array which means all BOs were correctly added to the BO list,
and this has been broken recently. IB BOs need to be added to the list.

When a BO isn't added to the list as part of a submission, it might
randomly VM faults.

This fixes VM faults and random GPU hangs on NAVI21 in Mesa CI.

Closes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/8849
Fixes: 41a9bced31 ("radv: Fill continue preambles and postambles properly.")
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22625>
(cherry picked from commit 84d8ea6e2b)
This commit is contained in:
Samuel Pitoiset 2023-04-21 10:11:36 +02:00 committed by Eric Engestrom
parent ba5c0f0ffd
commit c7e678b302
2 changed files with 17 additions and 4 deletions

View file

@ -283,7 +283,7 @@
"description": "radv/amdgpu: fix adding continue preambles and postambles BOs to the list",
"nominated": true,
"nomination_type": 1,
"resolution": 0,
"resolution": 1,
"main_sha": null,
"because_sha": "41a9bced313dded77693e9df10e5ccb18542320f"
},

View file

@ -875,12 +875,24 @@ radv_amdgpu_winsys_cs_submit_internal(
struct radv_amdgpu_cs *last_cs = radv_amdgpu_cs(cs_array[cs_count - 1]);
struct radv_amdgpu_winsys *ws = last_cs->ws;
/* Get the BO list. Assume continue preambles and postambles don't need more. */
struct drm_amdgpu_bo_list_entry *handles = NULL;
unsigned num_handles = 0;
unsigned num_extra_cs = initial_preamble_count + continue_preamble_count + postamble_count;
unsigned extra_cs_idx = 0;
STACK_ARRAY(struct radeon_cmdbuf *, extra_cs, num_extra_cs);
for (unsigned i = 0; i < initial_preamble_count; i++)
extra_cs[extra_cs_idx++] = initial_preamble_cs[i];
for (unsigned i = 0; i < continue_preamble_count; i++)
extra_cs[extra_cs_idx++] = continue_preamble_cs[i];
for (unsigned i = 0; i < postamble_count; i++)
extra_cs[extra_cs_idx++] = postamble_cs[i];
u_rwlock_rdlock(&ws->global_bo_list.lock);
result = radv_amdgpu_get_bo_list(ws, &cs_array[0], cs_count, NULL, 0, initial_preamble_cs,
initial_preamble_count, &num_handles, &handles);
result = radv_amdgpu_get_bo_list(ws, &cs_array[0], cs_count, NULL, 0, extra_cs, num_extra_cs,
&num_handles, &handles);
if (result != VK_SUCCESS)
goto fail;
@ -993,6 +1005,7 @@ radv_amdgpu_winsys_cs_submit_internal(
radv_assign_last_submit(ctx, &request);
fail:
STACK_ARRAY_FINISH(extra_cs);
u_rwlock_rdunlock(&ws->global_bo_list.lock);
return result;
}