radv: add fields to radv_compiler_info from radv_physical_device_cache_key

Signed-off-by: Rhys Perry <pendingchaos02@gmail.com>
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/41022>
This commit is contained in:
Rhys Perry 2026-04-23 16:30:01 +01:00 committed by Marge Bot
parent 3aa6903883
commit c6c4f523af
2 changed files with 42 additions and 3 deletions

View file

@ -1133,7 +1133,9 @@ radv_device_init_compiler_info(struct radv_device *device)
if (instance->debug_flags & RADV_DEBUG_DUMP_CS)
dump_shaders |= VK_SHADER_STAGE_COMPUTE_BIT | RADV_RT_STAGE_BITS;
if (pdev->cache_key.use_ngg_culling) {
const struct radv_physical_device_cache_key *pdev_key = &pdev->cache_key;
if (pdev_key->use_ngg_culling) {
/* Shader based culling efficiency can depend on PS throughput.
* Estimate an upper limit for PS input param count based on GPU info.
*/
@ -1155,7 +1157,9 @@ radv_device_init_compiler_info(struct radv_device *device)
/* Shader features */
.use_llvm = pdev->use_llvm,
.use_ngg = pdev->use_ngg,
.use_ngg_culling = pdev_key->use_ngg_culling,
.nggc_max_ps_params = nggc_max_ps_params,
.no_ngg_gs = pdev_key->no_ngg_gs,
.load_grid_size_from_user_sgpr = pdev->load_grid_size_from_user_sgpr,
.emulate_ngg_gs_query_pipeline_stat = pdev->emulate_ngg_gs_query_pipeline_stat,
.primitives_generated_query = device->cache_key.primitives_generated_query,
@ -1164,6 +1168,23 @@ radv_device_init_compiler_info(struct radv_device *device)
.use_fmask = pdev->use_fmask,
.robust_buffer_access = pdev->use_llvm && (device->vk.enabled_features.robustBufferAccess2 ||
device->vk.enabled_features.robustBufferAccess),
.mitigate_smem_oob = pdev_key->mitigate_smem_oob,
.bvh8 = pdev_key->bvh8,
.no_rt = pdev_key->no_rt,
.rt_cps = pdev_key->rt_cps,
.clear_lds = pdev_key->clear_lds,
.disable_aniso_single_level = pdev_key->disable_aniso_single_level,
.disable_shrink_image_store = pdev_key->disable_shrink_image_store,
.disable_sinking_load_input_fs = pdev_key->disable_sinking_load_input_fs,
.disable_trunc_coord = pdev_key->disable_trunc_coord,
.enable_mrt_output_nan_fixup = pdev_key->enable_mrt_output_nan_fixup,
.emulate_rt = pdev_key->emulate_rt,
.invariant_geom = pdev_key->invariant_geom,
.split_fma = pdev_key->split_fma,
.ssbo_non_uniform = pdev_key->ssbo_non_uniform,
.tex_non_uniform = pdev_key->tex_non_uniform,
.lower_terminate_to_discard = pdev_key->lower_terminate_to_discard,
.no_implicit_varying_subgroup_size = pdev_key->no_implicit_varying_subgroup_size,
.force_aniso = device->force_aniso,
/* Wave/subgroup sizes */
@ -1202,7 +1223,7 @@ radv_device_init_compiler_info(struct radv_device *device)
.cache_disabled = radv_device_is_cache_disabled(device),
.enable_nir_cache = !!(instance->debug_flags & RADV_PERFTEST_NIR_CACHE),
.mem_cache = device->mem_cache,
.cache_key = &pdev->cache_key,
.cache_key = pdev_key,
.override_graphics_shader_version = instance->drirc.misc.override_graphics_shader_version,
.override_ray_tracing_shader_version = instance->drirc.misc.override_ray_tracing_shader_version,
.override_compute_shader_version = instance->drirc.misc.override_compute_shader_version,

View file

@ -525,7 +525,9 @@ struct radv_compiler_info {
/* Shader features */
uint32_t use_llvm : 1;
uint32_t use_ngg : 1;
uint32_t use_ngg_culling : 1;
uint32_t nggc_max_ps_params : 4;
uint32_t no_ngg_gs : 1;
uint32_t load_grid_size_from_user_sgpr : 1;
uint32_t emulate_ngg_gs_query_pipeline_stat : 1;
uint32_t primitives_generated_query : 1;
@ -533,7 +535,23 @@ struct radv_compiler_info {
uint32_t image_2d_view_of_3d : 1;
uint32_t use_fmask : 1;
uint32_t robust_buffer_access : 1; /* Only used by LLVM. */
uint32_t padding : 19;
uint32_t mitigate_smem_oob : 1;
uint32_t bvh8 : 1;
uint32_t no_rt : 1;
uint32_t rt_cps : 1;
uint32_t clear_lds : 1;
uint32_t disable_aniso_single_level : 1;
uint32_t disable_shrink_image_store : 1;
uint32_t disable_sinking_load_input_fs : 1;
uint32_t disable_trunc_coord : 1;
uint32_t enable_mrt_output_nan_fixup : 1;
uint32_t emulate_rt : 1;
uint32_t invariant_geom : 1;
uint32_t split_fma : 1;
uint32_t ssbo_non_uniform : 1;
uint32_t tex_non_uniform : 1;
uint32_t lower_terminate_to_discard : 1;
uint32_t no_implicit_varying_subgroup_size : 1;
int32_t force_aniso;